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authorChris Wilson <chris@chris-wilson.co.uk>2012-08-26 21:22:14 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-08-27 09:34:30 +0200
commita4783f9485f78c80e7cc1eb041634b4b8a3aa4b9 (patch)
treef8f7c7f19951008fa4a7f229ff6d3d63b0c9bfe5 /tools/intel_gtt.c
parent3d148e164d498d81cc3990c85b65afee8bcca3b8 (diff)
intel_gtt: Harden against changes to kernel mappings of the GTT
Rather than use the common mmio segment which will be in future restricted to just the registers and so exclude the GTT portion on all architectures, explicitly mmap the GTT ourselves. Repeat this mmapping with a couple of flags until we matching the existing kernel mapping. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/intel_gtt.c')
-rw-r--r--tools/intel_gtt.c46
1 files changed, 30 insertions, 16 deletions
diff --git a/tools/intel_gtt.c b/tools/intel_gtt.c
index c246fdae..05d36d71 100644
--- a/tools/intel_gtt.c
+++ b/tools/intel_gtt.c
@@ -45,33 +45,47 @@ int main(int argc, char **argv)
int start, aper_size;
unsigned char *gtt;
uint32_t devid;
+ int flag[] = {
+ PCI_DEV_MAP_FLAG_WRITE_COMBINE,
+ PCI_DEV_MAP_FLAG_WRITABLE,
+ 0
+ }, f;
pci_dev = intel_get_pci_device();
devid = pci_dev->device_id;
- intel_get_mmio(pci_dev);
if (IS_GEN2(devid)) {
printf("Unsupported chipset for gtt dumper\n");
exit(1);
}
- if (IS_G4X(devid) || IS_GEN5(devid))
- gtt = ((unsigned char *)mmio + MB(2));
- else if (IS_965(devid))
- gtt = ((unsigned char *)mmio + KB(512));
- else {
- /* 915/945 chips has GTT range in bar 3 */
- int err;
- err = pci_device_map_range(pci_dev,
- pci_dev->regions[3].base_addr,
- pci_dev->regions[3].size,
- PCI_DEV_MAP_FLAG_WRITABLE,
- (void **)&gtt);
- if (err != 0) {
- fprintf(stderr, "mapping GTT bar failed\n");
- exit(1);
+ for (f = 0; flag[f] != 0; f++) {
+ if (IS_GEN3(devid)) {
+ /* 915/945 chips has GTT range in bar 3 */
+ if (pci_device_map_range(pci_dev,
+ pci_dev->regions[3].base_addr,
+ pci_dev->regions[3].size,
+ flag[f],
+ (void **)&gtt) == 0)
+ break;
+ } else {
+ int offset;
+ if (IS_G4X(devid) || IS_GEN5(devid))
+ offset = MB(2);
+ else
+ offset = KB(512);
+ if (pci_device_map_range(pci_dev,
+ pci_dev->regions[0].base_addr + offset,
+ offset,
+ flag[f],
+ (void **)&gtt) == 0)
+ break;
}
}
+ if (flag[f] == 0) {
+ printf("Failed to map gtt\n");
+ exit(1);
+ }
aper_size = pci_dev->regions[2].size;