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authorTomeu Vizoso <tomeu.vizoso@collabora.com>2017-03-02 10:37:11 +0100
committerTomeu Vizoso <tomeu.vizoso@collabora.com>2017-03-21 15:50:54 +0100
commit301ad44cdf1b868b1ab89096721da91fa8541fdc (patch)
treeef18781db6cadae7f8f49f1fc449dc56b33448ec /tools/intel_watermark.c
parente7a0d06730f77842998368660fb45fe5c1738fda (diff)
lib: Open debugfs files for the given DRM device
When opening a DRM debugfs file, locate the right path based on the given DRM device FD. This is needed so, in setups with more than one DRM device, any operations on debugfs files affect the expected DRM device. v2: - rebased and fixed new API additions v3: - updated chamelium test, which was missed previously - use the minor of the device for the debugfs path, not the major - have a proper exit handler for calling igt_hpd_storm_reset with the right device fd. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Reviewed-by: Robert Foss <robert.foss@collabora.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'tools/intel_watermark.c')
-rw-r--r--tools/intel_watermark.c23
1 files changed, 14 insertions, 9 deletions
diff --git a/tools/intel_watermark.c b/tools/intel_watermark.c
index e9a2b057..d98ef19b 100644
--- a/tools/intel_watermark.c
+++ b/tools/intel_watermark.c
@@ -30,11 +30,11 @@
#include <string.h>
#include "intel_io.h"
#include "intel_chipset.h"
+#include "drmtest.h"
static uint32_t display_base;
static uint32_t devid;
-
-#define ARRAY_SIZE(a) (sizeof(a)/sizeof((a)[0]))
+static int drm_fd;
static uint32_t read_reg(uint32_t addr)
{
@@ -143,7 +143,7 @@ static void ilk_wm_dump(void)
int num_pipes = is_gen7_plus(devid) ? 3 : 2;
struct ilk_wm wm = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
for (i = 0; i < num_pipes; i++) {
dspcntr[i] = read_reg(0x70180 + i * 0x1000);
@@ -291,7 +291,7 @@ static void vlv_wm_dump(void)
uint32_t dsp_ss_pm, ddr_setup2;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
dsparb = read_reg(0x70030);
dsparb2 = read_reg(0x70060);
@@ -507,7 +507,7 @@ static void g4x_wm_dump(void)
uint32_t mi_arb_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
dspacntr = read_reg(0x70180);
dspbcntr = read_reg(0x71180);
@@ -593,7 +593,7 @@ static void gen4_wm_dump(void)
uint32_t mi_arb_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
dsparb = read_reg(0x70030);
fw1 = read_reg(0x70034);
@@ -664,7 +664,7 @@ static void pnv_wm_dump(void)
uint32_t cbr;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
dsparb = read_reg(0x70030);
fw1 = read_reg(0x70034);
@@ -754,7 +754,7 @@ static void gen3_wm_dump(void)
uint32_t mi_arb_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
dsparb = read_reg(0x70030);
instpm = read_reg(0x20c0);
@@ -823,7 +823,7 @@ static void gen2_wm_dump(void)
uint32_t mi_state;
struct gmch_wm wms[MAX_PLANE] = {};
- intel_register_access_init(intel_get_pci_device(), 0);
+ intel_register_access_init(intel_get_pci_device(), 0, drm_fd);
dsparb = read_reg(0x70030);
mem_mode = read_reg(0x20cc);
@@ -900,6 +900,9 @@ int main(int argc, char *argv[])
{
devid = intel_get_pci_device()->device_id;
+ /* Just to make sure we open the right debugfs files */
+ drm_fd = drm_open_driver_master(DRIVER_INTEL);
+
if (IS_VALLEYVIEW(devid) || IS_CHERRYVIEW(devid)) {
display_base = 0x180000;
vlv_wm_dump();
@@ -920,5 +923,7 @@ int main(int argc, char *argv[])
return 1;
}
+ close(drm_fd);
+
return 0;
}