diff options
| author | Lukasz Kalamarz <lukasz.kalamarz@intel.com> | 2018-05-25 09:15:33 +0200 |
|---|---|---|
| committer | Katarzyna Dec <katarzyna.dec@intel.com> | 2018-06-05 08:37:31 +0200 |
| commit | f506fd512eaff6fab8846c01c918cca450ddc8ef (patch) | |
| tree | ab64157321a6089d76b96c2feb122482780ed26d /tools/null_state_gen/intel_renderstate_gen6.c | |
| parent | 3419ecf643dad9a2f22db9410234d879be4f827c (diff) | |
lib: Rename all surfaceformat calls in libs
This patch is renaming all surfaceformat registers to use
names introduced in surfaceformat.h instead of using
per gen definitions
v2: Drop GEN_ from register names. Applied that to
other libs.
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Diffstat (limited to 'tools/null_state_gen/intel_renderstate_gen6.c')
| -rw-r--r-- | tools/null_state_gen/intel_renderstate_gen6.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tools/null_state_gen/intel_renderstate_gen6.c b/tools/null_state_gen/intel_renderstate_gen6.c index 5c1b7f97..13b1e92e 100644 --- a/tools/null_state_gen/intel_renderstate_gen6.c +++ b/tools/null_state_gen/intel_renderstate_gen6.c @@ -190,7 +190,7 @@ static void gen6_emit_null_depth_buffer(struct intel_batchbuffer *batch) { OUT_BATCH(GEN6_3DSTATE_DEPTH_BUFFER | (7 - 2)); - OUT_BATCH(GEN6_SURFACE_NULL << GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | + OUT_BATCH(SURFACE_NULL << GEN6_3DSTATE_DEPTH_BUFFER_TYPE_SHIFT | GEN6_DEPTHFORMAT_D32_FLOAT << GEN6_3DSTATE_DEPTH_BUFFER_FORMAT_SHIFT); OUT_BATCH(0); OUT_BATCH(0); @@ -314,7 +314,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) OUT_BATCH(GEN6_3DSTATE_VERTEX_ELEMENTS | (2 * 3 + 1 - 2)); OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R32G32B32A32_FLOAT << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); OUT_BATCH(GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_0 << VE1_VFCOMPONENT_1_SHIFT | @@ -323,7 +323,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) /* x,y */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R16G16_SSCALED << VE0_FORMAT_SHIFT | 0 << VE0_OFFSET_SHIFT); /* offsets vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | @@ -332,7 +332,7 @@ gen6_emit_vertex_elements(struct intel_batchbuffer *batch) /* u0, v0 */ OUT_BATCH(0 << VE0_VERTEX_BUFFER_INDEX_SHIFT | VE0_VALID | - GEN6_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | + SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT | 4 << VE0_OFFSET_SHIFT); /* offset vb in bytes */ OUT_BATCH(GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT | GEN6_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT | |