diff options
| author | Lukasz Kalamarz <lukasz.kalamarz@intel.com> | 2018-06-12 14:10:00 +0200 |
|---|---|---|
| committer | Katarzyna Dec <katarzyna.dec@intel.com> | 2018-06-14 14:58:33 +0200 |
| commit | ad5858e320625dd1ad1555ca0cb4da2cfad96fda (patch) | |
| tree | 40d6f49b3d4a5d20c899b8578577fcadec0664d0 /tools/null_state_gen/intel_renderstate_gen8.c | |
| parent | 7669af4462359062a52d4b3d1f77c88cc293fb42 (diff) | |
lib/rendercopy: Use gen6 definitions if applicable
Instead of using definitions duplicated in gen7_render header,
we should use the oldest definition that is working with
chosen gen. This patch reuses gen6 definitons if
registers/fields/shifts that were reintroduced in
other genX_render headers.
v2: Fixed commit message
v3: fixed typos in commit msg
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Ewelina Musial <ewelina.musial@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Diffstat (limited to 'tools/null_state_gen/intel_renderstate_gen8.c')
| -rw-r--r-- | tools/null_state_gen/intel_renderstate_gen8.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/tools/null_state_gen/intel_renderstate_gen8.c b/tools/null_state_gen/intel_renderstate_gen8.c index 6a309d43..08def120 100644 --- a/tools/null_state_gen/intel_renderstate_gen8.c +++ b/tools/null_state_gen/intel_renderstate_gen8.c @@ -346,7 +346,7 @@ void gen8_setup_null_render_state(struct intel_batchbuffer *batch) gen8_emit_vs(batch); gen8_emit_hs(batch); - OUT_CMD(GEN7_3DSTATE_GS, 10); + OUT_CMD(GEN6_3DSTATE_GS, 10); OUT_CMD(GEN7_3DSTATE_STREAMOUT, 5); OUT_CMD(GEN7_3DSTATE_DS, 9); OUT_CMD(GEN6_3DSTATE_CLIP, 4); @@ -368,8 +368,8 @@ void gen8_setup_null_render_state(struct intel_batchbuffer *batch) OUT_CMD(GEN6_3DSTATE_CONSTANT_VS, 11); OUT_CMD(GEN7_3DSTATE_CONSTANT_HS, 11); OUT_CMD(GEN7_3DSTATE_CONSTANT_DS, 11); - OUT_CMD(GEN7_3DSTATE_CONSTANT_GS, 11); - OUT_CMD(GEN7_3DSTATE_CONSTANT_PS, 11); + OUT_CMD(GEN6_3DSTATE_CONSTANT_GS, 11); + OUT_CMD(GEN6_3DSTATE_CONSTANT_PS, 11); OUT_CMD(GEN8_3DSTATE_VF_INSTANCING, 3); OUT_CMD(GEN8_3DSTATE_VF_SGVS, 2); @@ -399,8 +399,8 @@ void gen8_setup_null_render_state(struct intel_batchbuffer *batch) OUT_CMD(GEN7_3DSTATE_CLEAR_PARAMS, 3); OUT_CMD(GEN6_3DSTATE_MONOFILTER_SIZE, 2); OUT_CMD(GEN8_3DSTATE_MULTISAMPLE, 2); - OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_OFFSET, 2); - OUT_CMD(GEN8_3DSTATE_POLY_STIPPLE_PATTERN, 33); + OUT_CMD(GEN6_3DSTATE_POLY_STIPPLE_OFFSET, 2); + OUT_CMD(GEN6_3DSTATE_POLY_STIPPLE_PATTERN, 33); OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD0, 16 + 1); OUT_CMD(GEN8_3DSTATE_SAMPLER_PALETTE_LOAD1, 16 + 1); OUT_CMD(GEN6_3DSTATE_INDEX_BUFFER, 5); |