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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2013-03-22 14:28:24 -0300
committerPaulo Zanoni <paulo.r.zanoni@intel.com>2013-03-22 14:45:06 -0300
commit7253eb4e4f875777104e24454b2216d17655cae1 (patch)
tree5fb8a4fc69666cafc24ddd8dbc3fbd32cb0759db /tools
parent1043b22bb02ddb37e3abbcc2108c6ebe03eeb9f0 (diff)
intel_reg_dumper: debug SDEISR on Haswell
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Diffstat (limited to 'tools')
-rw-r--r--tools/intel_reg_dumper.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
index 0d24d01c..a09afd4c 100644
--- a/tools/intel_reg_dumper.c
+++ b/tools/intel_reg_dumper.c
@@ -1795,6 +1795,19 @@ DEBUGSTRING(hsw_debug_wm_pipe)
sprite, cursor);
}
+DEBUGSTRING(hsw_debug_sinterrupt)
+{
+ int portd, portc, portb, crt;
+
+ portd = (val >> 23) & 1;
+ portc = (val >> 22) & 1;
+ portb = (val >> 21) & 1;
+ crt = (val >> 19) & 1;
+
+ snprintf(result, len, "port d:%d, port c:%d, port b:%d, crt:%d",
+ portd, portc, portb, crt);
+}
+
static struct reg_debug ironlake_debug_regs[] = {
DEFINEREG(PGETBL_CTL),
DEFINEREG(GEN6_INSTDONE_1),
@@ -2253,6 +2266,8 @@ static struct reg_debug haswell_debug_regs[] = {
DEFINEREG(PIXCLK_GATE),
+ DEFINEREG2(SDEISR, hsw_debug_sinterrupt),
+
DEFINEREG(RC6_RESIDENCY_TIME),
};