diff options
| -rw-r--r-- | tools/Makefile.am | 2 | ||||
| -rw-r--r-- | tools/quick_dump/Makefile.am | 19 | ||||
| -rw-r--r-- | tools/quick_dump/chipset.i | 12 | ||||
| -rw-r--r-- | tools/quick_dump/intel_chipset.c | 16 | ||||
| -rwxr-xr-x | tools/quick_dump/quick_dump.py | 15 |
5 files changed, 62 insertions, 2 deletions
diff --git a/tools/Makefile.am b/tools/Makefile.am index 016fb890..60889190 100644 --- a/tools/Makefile.am +++ b/tools/Makefile.am @@ -1,4 +1,4 @@ -DIST_SUBDIRS = quick_dump +SUBDIRS = quick_dump bin_PROGRAMS = \ intel_disable_clock_gating \ diff --git a/tools/quick_dump/Makefile.am b/tools/quick_dump/Makefile.am index a0c70837..04409f21 100644 --- a/tools/quick_dump/Makefile.am +++ b/tools/quick_dump/Makefile.am @@ -1,6 +1,23 @@ +BUILT_SOURCES = chipset_wrap_python.c + +bin_SCRIPTS = quick_dump.py chipset.py + +lib_LTLIBRARIES = I915ChipsetPython.la +I915ChipsetPython_la_CFLAGS = -I$(top_srcdir)/lib $(PYTHON_CPPFLAGS) +I915ChipsetPython_la_LDFLAGS = -module -avoid-version $(PYTHON_LDFLAGS) +I915ChipsetPython_la_SOURCES = chipset_wrap_python.c intel_chipset.c + +chipset_wrap_python.c: chipset.i + $(SWIG) $(AX_SWIG_PYTHON_OPT) -I$(top_srcdir)/lib -o $@ $< + +all-local: I915ChipsetPython.la + $(LN_S) -f .libs/I915ChipsetPython.so _chipset.so + +CLEANFILES = chipset_wrap_python.c chipset.py _chipset.so EXTRA_DIST = \ base_display.txt base_interrupt.txt base_other.txt base_power.txt base_rings.txt \ gen6_other.txt sandybridge \ gen7_other.txt ivybridge \ vlv_display.txt valleyview \ - quick_dump.py + quick_dump.py \ + chipset.i chipset.py diff --git a/tools/quick_dump/chipset.i b/tools/quick_dump/chipset.i new file mode 100644 index 00000000..16c49328 --- /dev/null +++ b/tools/quick_dump/chipset.i @@ -0,0 +1,12 @@ +%module chipset +%{ +#include "intel_chipset.h" +extern int is_sandybridge(unsigned short pciid); +extern int is_ivybridge(unsigned short pciid); +extern int is_valleyview(unsigned short pciid); +%} + +%include "intel_chipset.h" +extern int is_sandybridge(unsigned short pciid); +extern int is_ivybridge(unsigned short pciid); +extern int is_valleyview(unsigned short pciid); diff --git a/tools/quick_dump/intel_chipset.c b/tools/quick_dump/intel_chipset.c new file mode 100644 index 00000000..b242ffc0 --- /dev/null +++ b/tools/quick_dump/intel_chipset.c @@ -0,0 +1,16 @@ +#include "intel_chipset.h" + +int is_sandybridge(unsigned short pciid) +{ + return IS_GEN6(pciid); +} + +int is_ivybridge(unsigned short pciid) +{ + return IS_IVYBRIDGE(pciid); +} + +int is_valleyview(unsigned short pciid) +{ + return IS_VALLEYVIEW(pciid); +} diff --git a/tools/quick_dump/quick_dump.py b/tools/quick_dump/quick_dump.py index 3fea7bbe..59cae1fd 100755 --- a/tools/quick_dump/quick_dump.py +++ b/tools/quick_dump/quick_dump.py @@ -5,6 +5,7 @@ import os import sys import ast import subprocess +import chipset def parse_file(file): for line in file: @@ -18,6 +19,7 @@ def parse_file(file): parser = argparse.ArgumentParser(description='Dumb register dumper.') parser.add_argument('-b', '--baseless', action='store_true', default=False, help='baseless mode, ignore files starting with base_') +parser.add_argument('-a', '--autodetect', action='store_true', default=False, help='autodetect chipset') parser.add_argument('profile', nargs='?', type=argparse.FileType('r'), default=None) args = parser.parse_args() @@ -29,6 +31,19 @@ if args.baseless == False: file = open(name.rstrip(), 'r') parse_file(file) +if args.autodetect: + sysfs_file = open('/sys/class/drm/card0/device/device', 'r') + devid_str = sysfs_file.read() + devid = int(devid_str, 16) + if chipset.is_sandybridge(devid): + args.profile = open('sandybridge', 'r') + elif chipset.is_ivybridge(devid): + args.profile = open('ivybridge', 'r') + elif chipset.is_valleyview(devid): + args.profile = open('valleyview', 'r') + else: + print("Autodetect of %x " + devid + " failed") + if args.profile == None: sys.exit() |