diff options
Diffstat (limited to 'assembler/brw_structs.h')
| -rw-r--r-- | assembler/brw_structs.h | 1698 |
1 files changed, 846 insertions, 852 deletions
diff --git a/assembler/brw_structs.h b/assembler/brw_structs.h index 2f6aafb8..8c2d2b9f 100644 --- a/assembler/brw_structs.h +++ b/assembler/brw_structs.h @@ -35,12 +35,6 @@ #include <stdint.h> -typedef unsigned char GLubyte; -typedef short GLshort; -typedef unsigned int GLuint; -typedef int GLint; -typedef float GLfloat; - /* These seem to be passed around as function args, so it works out * better to keep them as #defines: */ @@ -53,31 +47,31 @@ struct brw_urb_fence { struct { - GLuint length:8; - GLuint vs_realloc:1; - GLuint gs_realloc:1; - GLuint clp_realloc:1; - GLuint sf_realloc:1; - GLuint vfe_realloc:1; - GLuint cs_realloc:1; - GLuint pad:2; - GLuint opcode:16; + unsigned length:8; + unsigned vs_realloc:1; + unsigned gs_realloc:1; + unsigned clp_realloc:1; + unsigned sf_realloc:1; + unsigned vfe_realloc:1; + unsigned cs_realloc:1; + unsigned pad:2; + unsigned opcode:16; } header; struct { - GLuint vs_fence:10; - GLuint gs_fence:10; - GLuint clp_fence:10; - GLuint pad:2; + unsigned vs_fence:10; + unsigned gs_fence:10; + unsigned clp_fence:10; + unsigned pad:2; } bits0; struct { - GLuint sf_fence:10; - GLuint vf_fence:10; - GLuint cs_fence:11; - GLuint pad:1; + unsigned sf_fence:10; + unsigned vf_fence:10; + unsigned cs_fence:11; + unsigned pad:1; } bits1; }; @@ -87,48 +81,48 @@ struct brw_urb_fence struct thread0 { - GLuint pad0:1; - GLuint grf_reg_count:3; - GLuint pad1:2; - GLuint kernel_start_pointer:26; /* Offset from GENERAL_STATE_BASE */ + unsigned pad0:1; + unsigned grf_reg_count:3; + unsigned pad1:2; + unsigned kernel_start_pointer:26; /* Offset from GENERAL_STATE_BASE */ }; struct thread1 { - GLuint ext_halt_exception_enable:1; - GLuint sw_exception_enable:1; - GLuint mask_stack_exception_enable:1; - GLuint timeout_exception_enable:1; - GLuint illegal_op_exception_enable:1; - GLuint pad0:3; - GLuint depth_coef_urb_read_offset:6; /* WM only */ - GLuint pad1:2; - GLuint floating_point_mode:1; - GLuint thread_priority:1; - GLuint binding_table_entry_count:8; - GLuint pad3:5; - GLuint single_program_flow:1; + unsigned ext_halt_exception_enable:1; + unsigned sw_exception_enable:1; + unsigned mask_stack_exception_enable:1; + unsigned timeout_exception_enable:1; + unsigned illegal_op_exception_enable:1; + unsigned pad0:3; + unsigned depth_coef_urb_read_offset:6; /* WM only */ + unsigned pad1:2; + unsigned floating_point_mode:1; + unsigned thread_priority:1; + unsigned binding_table_entry_count:8; + unsigned pad3:5; + unsigned single_program_flow:1; }; struct thread2 { - GLuint per_thread_scratch_space:4; - GLuint pad0:6; - GLuint scratch_space_base_pointer:22; + unsigned per_thread_scratch_space:4; + unsigned pad0:6; + unsigned scratch_space_base_pointer:22; }; struct thread3 { - GLuint dispatch_grf_start_reg:4; - GLuint urb_entry_read_offset:6; - GLuint pad0:1; - GLuint urb_entry_read_length:6; - GLuint pad1:1; - GLuint const_urb_entry_read_offset:6; - GLuint pad2:1; - GLuint const_urb_entry_read_length:6; - GLuint pad3:1; + unsigned dispatch_grf_start_reg:4; + unsigned urb_entry_read_offset:6; + unsigned pad0:1; + unsigned urb_entry_read_length:6; + unsigned pad1:1; + unsigned const_urb_entry_read_offset:6; + unsigned pad2:1; + unsigned const_urb_entry_read_length:6; + unsigned pad3:1; }; @@ -138,18 +132,18 @@ struct brw_clip_unit_state struct thread0 thread0; struct { - GLuint pad0:7; - GLuint sw_exception_enable:1; - GLuint pad1:3; - GLuint mask_stack_exception_enable:1; - GLuint pad2:1; - GLuint illegal_op_exception_enable:1; - GLuint pad3:2; - GLuint floating_point_mode:1; - GLuint thread_priority:1; - GLuint binding_table_entry_count:8; - GLuint pad4:5; - GLuint single_program_flow:1; + unsigned pad0:7; + unsigned sw_exception_enable:1; + unsigned pad1:3; + unsigned mask_stack_exception_enable:1; + unsigned pad2:1; + unsigned illegal_op_exception_enable:1; + unsigned pad3:2; + unsigned floating_point_mode:1; + unsigned thread_priority:1; + unsigned binding_table_entry_count:8; + unsigned pad4:5; + unsigned single_program_flow:1; } thread1; struct thread2 thread2; @@ -157,142 +151,142 @@ struct brw_clip_unit_state struct { - GLuint pad0:9; - GLuint gs_output_stats:1; /* not always */ - GLuint stats_enable:1; - GLuint nr_urb_entries:7; - GLuint pad1:1; - GLuint urb_entry_allocation_size:5; - GLuint pad2:1; - GLuint max_threads:5; /* may be less */ - GLuint pad3:2; + unsigned pad0:9; + unsigned gs_output_stats:1; /* not always */ + unsigned stats_enable:1; + unsigned nr_urb_entries:7; + unsigned pad1:1; + unsigned urb_entry_allocation_size:5; + unsigned pad2:1; + unsigned max_threads:5; /* may be less */ + unsigned pad3:2; } thread4; struct { - GLuint pad0:13; - GLuint clip_mode:3; - GLuint userclip_enable_flags:8; - GLuint userclip_must_clip:1; - GLuint negative_w_clip_test:1; - GLuint guard_band_enable:1; - GLuint viewport_z_clip_enable:1; - GLuint viewport_xy_clip_enable:1; - GLuint vertex_position_space:1; - GLuint api_mode:1; - GLuint pad2:1; + unsigned pad0:13; + unsigned clip_mode:3; + unsigned userclip_enable_flags:8; + unsigned userclip_must_clip:1; + unsigned negative_w_clip_test:1; + unsigned guard_band_enable:1; + unsigned viewport_z_clip_enable:1; + unsigned viewport_xy_clip_enable:1; + unsigned vertex_position_space:1; + unsigned api_mode:1; + unsigned pad2:1; } clip5; struct { - GLuint pad0:5; - GLuint clipper_viewport_state_ptr:27; + unsigned pad0:5; + unsigned clipper_viewport_state_ptr:27; } clip6; - GLfloat viewport_xmin; - GLfloat viewport_xmax; - GLfloat viewport_ymin; - GLfloat viewport_ymax; + float viewport_xmin; + float viewport_xmax; + float viewport_ymin; + float viewport_ymax; }; struct gen6_blend_state { struct { - GLuint dest_blend_factor:5; - GLuint source_blend_factor:5; - GLuint pad3:1; - GLuint blend_func:3; - GLuint pad2:1; - GLuint ia_dest_blend_factor:5; - GLuint ia_source_blend_factor:5; - GLuint pad1:1; - GLuint ia_blend_func:3; - GLuint pad0:1; - GLuint ia_blend_enable:1; - GLuint blend_enable:1; + unsigned dest_blend_factor:5; + unsigned source_blend_factor:5; + unsigned pad3:1; + unsigned blend_func:3; + unsigned pad2:1; + unsigned ia_dest_blend_factor:5; + unsigned ia_source_blend_factor:5; + unsigned pad1:1; + unsigned ia_blend_func:3; + unsigned pad0:1; + unsigned ia_blend_enable:1; + unsigned blend_enable:1; } blend0; struct { - GLuint post_blend_clamp_enable:1; - GLuint pre_blend_clamp_enable:1; - GLuint clamp_range:2; - GLuint pad0:4; - GLuint x_dither_offset:2; - GLuint y_dither_offset:2; - GLuint dither_enable:1; - GLuint alpha_test_func:3; - GLuint alpha_test_enable:1; - GLuint pad1:1; - GLuint logic_op_func:4; - GLuint logic_op_enable:1; - GLuint pad2:1; - GLuint write_disable_b:1; - GLuint write_disable_g:1; - GLuint write_disable_r:1; - GLuint write_disable_a:1; - GLuint pad3:1; - GLuint alpha_to_coverage_dither:1; - GLuint alpha_to_one:1; - GLuint alpha_to_coverage:1; + unsigned post_blend_clamp_enable:1; + unsigned pre_blend_clamp_enable:1; + unsigned clamp_range:2; + unsigned pad0:4; + unsigned x_dither_offset:2; + unsigned y_dither_offset:2; + unsigned dither_enable:1; + unsigned alpha_test_func:3; + unsigned alpha_test_enable:1; + unsigned pad1:1; + unsigned logic_op_func:4; + unsigned logic_op_enable:1; + unsigned pad2:1; + unsigned write_disable_b:1; + unsigned write_disable_g:1; + unsigned write_disable_r:1; + unsigned write_disable_a:1; + unsigned pad3:1; + unsigned alpha_to_coverage_dither:1; + unsigned alpha_to_one:1; + unsigned alpha_to_coverage:1; } blend1; }; struct gen6_color_calc_state { struct { - GLuint alpha_test_format:1; - GLuint pad0:14; - GLuint round_disable:1; - GLuint bf_stencil_ref:8; - GLuint stencil_ref:8; + unsigned alpha_test_format:1; + unsigned pad0:14; + unsigned round_disable:1; + unsigned bf_stencil_ref:8; + unsigned stencil_ref:8; } cc0; union { - GLfloat alpha_ref_f; + float alpha_ref_f; struct { - GLuint ui:8; - GLuint pad0:24; + unsigned ui:8; + unsigned pad0:24; } alpha_ref_fi; } cc1; - GLfloat constant_r; - GLfloat constant_g; - GLfloat constant_b; - GLfloat constant_a; + float constant_r; + float constant_g; + float constant_b; + float constant_a; }; struct gen6_depth_stencil_state { struct { - GLuint pad0:3; - GLuint bf_stencil_pass_depth_pass_op:3; - GLuint bf_stencil_pass_depth_fail_op:3; - GLuint bf_stencil_fail_op:3; - GLuint bf_stencil_func:3; - GLuint bf_stencil_enable:1; - GLuint pad1:2; - GLuint stencil_write_enable:1; - GLuint stencil_pass_depth_pass_op:3; - GLuint stencil_pass_depth_fail_op:3; - GLuint stencil_fail_op:3; - GLuint stencil_func:3; - GLuint stencil_enable:1; + unsigned pad0:3; + unsigned bf_stencil_pass_depth_pass_op:3; + unsigned bf_stencil_pass_depth_fail_op:3; + unsigned bf_stencil_fail_op:3; + unsigned bf_stencil_func:3; + unsigned bf_stencil_enable:1; + unsigned pad1:2; + unsigned stencil_write_enable:1; + unsigned stencil_pass_depth_pass_op:3; + unsigned stencil_pass_depth_fail_op:3; + unsigned stencil_fail_op:3; + unsigned stencil_func:3; + unsigned stencil_enable:1; } ds0; struct { - GLuint bf_stencil_write_mask:8; - GLuint bf_stencil_test_mask:8; - GLuint stencil_write_mask:8; - GLuint stencil_test_mask:8; + unsigned bf_stencil_write_mask:8; + unsigned bf_stencil_test_mask:8; + unsigned stencil_write_mask:8; + unsigned stencil_test_mask:8; } ds1; struct { - GLuint pad0:26; - GLuint depth_write_enable:1; - GLuint depth_test_func:3; - GLuint pad1:1; - GLuint depth_test_enable:1; + unsigned pad0:26; + unsigned depth_write_enable:1; + unsigned depth_test_func:3; + unsigned pad1:1; + unsigned depth_test_enable:1; } ds2; }; @@ -300,90 +294,90 @@ struct brw_cc_unit_state { struct { - GLuint pad0:3; - GLuint bf_stencil_pass_depth_pass_op:3; - GLuint bf_stencil_pass_depth_fail_op:3; - GLuint bf_stencil_fail_op:3; - GLuint bf_stencil_func:3; - GLuint bf_stencil_enable:1; - GLuint pad1:2; - GLuint stencil_write_enable:1; - GLuint stencil_pass_depth_pass_op:3; - GLuint stencil_pass_depth_fail_op:3; - GLuint stencil_fail_op:3; - GLuint stencil_func:3; - GLuint stencil_enable:1; + unsigned pad0:3; + unsigned bf_stencil_pass_depth_pass_op:3; + unsigned bf_stencil_pass_depth_fail_op:3; + unsigned bf_stencil_fail_op:3; + unsigned bf_stencil_func:3; + unsigned bf_stencil_enable:1; + unsigned pad1:2; + unsigned stencil_write_enable:1; + unsigned stencil_pass_depth_pass_op:3; + unsigned stencil_pass_depth_fail_op:3; + unsigned stencil_fail_op:3; + unsigned stencil_func:3; + unsigned stencil_enable:1; } cc0; struct { - GLuint bf_stencil_ref:8; - GLuint stencil_write_mask:8; - GLuint stencil_test_mask:8; - GLuint stencil_ref:8; + unsigned bf_stencil_ref:8; + unsigned stencil_write_mask:8; + unsigned stencil_test_mask:8; + unsigned stencil_ref:8; } cc1; struct { - GLuint logicop_enable:1; - GLuint pad0:10; - GLuint depth_write_enable:1; - GLuint depth_test_function:3; - GLuint depth_test:1; - GLuint bf_stencil_write_mask:8; - GLuint bf_stencil_test_mask:8; + unsigned logicop_enable:1; + unsigned pad0:10; + unsigned depth_write_enable:1; + unsigned depth_test_function:3; + unsigned depth_test:1; + unsigned bf_stencil_write_mask:8; + unsigned bf_stencil_test_mask:8; } cc2; struct { - GLuint pad0:8; - GLuint alpha_test_func:3; - GLuint alpha_test:1; - GLuint blend_enable:1; - GLuint ia_blend_enable:1; - GLuint pad1:1; - GLuint alpha_test_format:1; - GLuint pad2:16; + unsigned pad0:8; + unsigned alpha_test_func:3; + unsigned alpha_test:1; + unsigned blend_enable:1; + unsigned ia_blend_enable:1; + unsigned pad1:1; + unsigned alpha_test_format:1; + unsigned pad2:16; } cc3; struct { - GLuint pad0:5; - GLuint cc_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */ + unsigned pad0:5; + unsigned cc_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */ } cc4; struct { - GLuint pad0:2; - GLuint ia_dest_blend_factor:5; - GLuint ia_src_blend_factor:5; - GLuint ia_blend_function:3; - GLuint statistics_enable:1; - GLuint logicop_func:4; - GLuint pad1:11; - GLuint dither_enable:1; + unsigned pad0:2; + unsigned ia_dest_blend_factor:5; + unsigned ia_src_blend_factor:5; + unsigned ia_blend_function:3; + unsigned statistics_enable:1; + unsigned logicop_func:4; + unsigned pad1:11; + unsigned dither_enable:1; } cc5; struct { - GLuint clamp_post_alpha_blend:1; - GLuint clamp_pre_alpha_blend:1; - GLuint clamp_range:2; - GLuint pad0:11; - GLuint y_dither_offset:2; - GLuint x_dither_offset:2; - GLuint dest_blend_factor:5; - GLuint src_blend_factor:5; - GLuint blend_function:3; + unsigned clamp_post_alpha_blend:1; + unsigned clamp_pre_alpha_blend:1; + unsigned clamp_range:2; + unsigned pad0:11; + unsigned y_dither_offset:2; + unsigned x_dither_offset:2; + unsigned dest_blend_factor:5; + unsigned src_blend_factor:5; + unsigned blend_function:3; } cc6; struct { union { - GLfloat f; - GLubyte ub[4]; + float f; + uint8_t ub[4]; } alpha_ref; } cc7; }; @@ -397,62 +391,62 @@ struct brw_sf_unit_state struct { - GLuint pad0:10; - GLuint stats_enable:1; - GLuint nr_urb_entries:7; - GLuint pad1:1; - GLuint urb_entry_allocation_size:5; - GLuint pad2:1; - GLuint max_threads:6; - GLuint pad3:1; + unsigned pad0:10; + unsigned stats_enable:1; + unsigned nr_urb_entries:7; + unsigned pad1:1; + unsigned urb_entry_allocation_size:5; + unsigned pad2:1; + unsigned max_threads:6; + unsigned pad3:1; } thread4; struct { - GLuint front_winding:1; - GLuint viewport_transform:1; - GLuint pad0:3; - GLuint sf_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */ + unsigned front_winding:1; + unsigned viewport_transform:1; + unsigned pad0:3; + unsigned sf_viewport_state_offset:27; /* Offset from GENERAL_STATE_BASE */ } sf5; struct { - GLuint pad0:9; - GLuint dest_org_vbias:4; - GLuint dest_org_hbias:4; - GLuint scissor:1; - GLuint disable_2x2_trifilter:1; - GLuint disable_zero_pix_trifilter:1; - GLuint point_rast_rule:2; - GLuint line_endcap_aa_region_width:2; - GLuint line_width:4; - GLuint fast_scissor_disable:1; - GLuint cull_mode:2; - GLuint aa_enable:1; + unsigned pad0:9; + unsigned dest_org_vbias:4; + unsigned dest_org_hbias:4; + unsigned scissor:1; + unsigned disable_2x2_trifilter:1; + unsigned disable_zero_pix_trifilter:1; + unsigned point_rast_rule:2; + unsigned line_endcap_aa_region_width:2; + unsigned line_width:4; + unsigned fast_scissor_disable:1; + unsigned cull_mode:2; + unsigned aa_enable:1; } sf6; struct { - GLuint point_size:11; - GLuint use_point_size_state:1; - GLuint subpixel_precision:1; - GLuint sprite_point:1; - GLuint pad0:10; - GLuint aa_line_distance_mode:1; - GLuint trifan_pv:2; - GLuint linestrip_pv:2; - GLuint tristrip_pv:2; - GLuint line_last_pixel_enable:1; + unsigned point_size:11; + unsigned use_point_size_state:1; + unsigned subpixel_precision:1; + unsigned sprite_point:1; + unsigned pad0:10; + unsigned aa_line_distance_mode:1; + unsigned trifan_pv:2; + unsigned linestrip_pv:2; + unsigned tristrip_pv:2; + unsigned line_last_pixel_enable:1; } sf7; }; struct gen6_scissor_rect { - GLuint xmin:16; - GLuint ymin:16; - GLuint xmax:16; - GLuint ymax:16; + unsigned xmin:16; + unsigned ymin:16; + unsigned xmax:16; + unsigned ymax:16; }; struct brw_gs_unit_state @@ -464,37 +458,37 @@ struct brw_gs_unit_state struct { - GLuint pad0:8; - GLuint rendering_enable:1; /* for Ironlake */ - GLuint pad4:1; - GLuint stats_enable:1; - GLuint nr_urb_entries:7; - GLuint pad1:1; - GLuint urb_entry_allocation_size:5; - GLuint pad2:1; - GLuint max_threads:5; - GLuint pad3:2; + unsigned pad0:8; + unsigned rendering_enable:1; /* for Ironlake */ + unsigned pad4:1; + unsigned stats_enable:1; + unsigned nr_urb_entries:7; + unsigned pad1:1; + unsigned urb_entry_allocation_size:5; + unsigned pad2:1; + unsigned max_threads:5; + unsigned pad3:2; } thread4; struct { - GLuint sampler_count:3; - GLuint pad0:2; - GLuint sampler_state_pointer:27; + unsigned sampler_count:3; + unsigned pad0:2; + unsigned sampler_state_pointer:27; } gs5; struct { - GLuint max_vp_index:4; - GLuint pad0:12; - GLuint svbi_post_inc_value:10; - GLuint pad1:1; - GLuint svbi_post_inc_enable:1; - GLuint svbi_payload:1; - GLuint discard_adjaceny:1; - GLuint reorder_enable:1; - GLuint pad2:1; + unsigned max_vp_index:4; + unsigned pad0:12; + unsigned svbi_post_inc_value:10; + unsigned pad1:1; + unsigned svbi_post_inc_enable:1; + unsigned svbi_payload:1; + unsigned discard_adjaceny:1; + unsigned reorder_enable:1; + unsigned pad2:1; } gs6; }; @@ -508,28 +502,28 @@ struct brw_vs_unit_state struct { - GLuint pad0:10; - GLuint stats_enable:1; - GLuint nr_urb_entries:7; - GLuint pad1:1; - GLuint urb_entry_allocation_size:5; - GLuint pad2:1; - GLuint max_threads:6; - GLuint pad3:1; + unsigned pad0:10; + unsigned stats_enable:1; + unsigned nr_urb_entries:7; + unsigned pad1:1; + unsigned urb_entry_allocation_size:5; + unsigned pad2:1; + unsigned max_threads:6; + unsigned pad3:1; } thread4; struct { - GLuint sampler_count:3; - GLuint pad0:2; - GLuint sampler_state_pointer:27; + unsigned sampler_count:3; + unsigned pad0:2; + unsigned sampler_state_pointer:27; } vs5; struct { - GLuint vs_enable:1; - GLuint vert_cache_disable:1; - GLuint pad0:30; + unsigned vs_enable:1; + unsigned vert_cache_disable:1; + unsigned pad0:30; } vs6; }; @@ -542,71 +536,71 @@ struct brw_wm_unit_state struct thread3 thread3; struct { - GLuint stats_enable:1; - GLuint depth_buffer_clear:1; - GLuint sampler_count:3; - GLuint sampler_state_pointer:27; + unsigned stats_enable:1; + unsigned depth_buffer_clear:1; + unsigned sampler_count:3; + unsigned sampler_state_pointer:27; } wm4; struct { - GLuint enable_8_pix:1; - GLuint enable_16_pix:1; - GLuint enable_32_pix:1; - GLuint enable_con_32_pix:1; - GLuint enable_con_64_pix:1; - GLuint pad0:1; + unsigned enable_8_pix:1; + unsigned enable_16_pix:1; + unsigned enable_32_pix:1; + unsigned enable_con_32_pix:1; + unsigned enable_con_64_pix:1; + unsigned pad0:1; /* These next four bits are for Ironlake+ */ - GLuint fast_span_coverage_enable:1; - GLuint depth_buffer_clear:1; - GLuint depth_buffer_resolve_enable:1; - GLuint hierarchical_depth_buffer_resolve_enable:1; - - GLuint legacy_global_depth_bias:1; - GLuint line_stipple:1; - GLuint depth_offset:1; - GLuint polygon_stipple:1; - GLuint line_aa_region_width:2; - GLuint line_endcap_aa_region_width:2; - GLuint early_depth_test:1; - GLuint thread_dispatch_enable:1; - GLuint program_uses_depth:1; - GLuint program_computes_depth:1; - GLuint program_uses_killpixel:1; - GLuint legacy_line_rast: 1; - GLuint transposed_urb_read_enable:1; - GLuint max_threads:7; + unsigned fast_span_coverage_enable:1; + unsigned depth_buffer_clear:1; + unsigned depth_buffer_resolve_enable:1; + unsigned hierarchical_depth_buffer_resolve_enable:1; + + unsigned legacy_global_depth_bias:1; + unsigned line_stipple:1; + unsigned depth_offset:1; + unsigned polygon_stipple:1; + unsigned line_aa_region_width:2; + unsigned line_endcap_aa_region_width:2; + unsigned early_depth_test:1; + unsigned thread_dispatch_enable:1; + unsigned program_uses_depth:1; + unsigned program_computes_depth:1; + unsigned program_uses_killpixel:1; + unsigned legacy_line_rast: 1; + unsigned transposed_urb_read_enable:1; + unsigned max_threads:7; } wm5; - GLfloat global_depth_offset_constant; - GLfloat global_depth_offset_scale; + float global_depth_offset_constant; + float global_depth_offset_scale; /* for Ironlake only */ struct { - GLuint pad0:1; - GLuint grf_reg_count_1:3; - GLuint pad1:2; - GLuint kernel_start_pointer_1:26; + unsigned pad0:1; + unsigned grf_reg_count_1:3; + unsigned pad1:2; + unsigned kernel_start_pointer_1:26; } wm8; struct { - GLuint pad0:1; - GLuint grf_reg_count_2:3; - GLuint pad1:2; - GLuint kernel_start_pointer_2:26; + unsigned pad0:1; + unsigned grf_reg_count_2:3; + unsigned pad1:2; + unsigned kernel_start_pointer_2:26; } wm9; struct { - GLuint pad0:1; - GLuint grf_reg_count_3:3; - GLuint pad1:2; - GLuint kernel_start_pointer_3:26; + unsigned pad0:1; + unsigned grf_reg_count_3:3; + unsigned pad1:2; + unsigned kernel_start_pointer_3:26; } wm10; }; struct brw_sampler_default_color { - GLfloat color[4]; + float color[4]; }; struct gen5_sampler_default_color { @@ -623,48 +617,48 @@ struct brw_sampler_state struct { - GLuint shadow_function:3; - GLuint lod_bias:11; - GLuint min_filter:3; - GLuint mag_filter:3; - GLuint mip_filter:2; - GLuint base_level:5; - GLuint min_mag_neq:1; - GLuint lod_preclamp:1; - GLuint default_color_mode:1; - GLuint pad0:1; - GLuint disable:1; + unsigned shadow_function:3; + unsigned lod_bias:11; + unsigned min_filter:3; + unsigned mag_filter:3; + unsigned mip_filter:2; + unsigned base_level:5; + unsigned min_mag_neq:1; + unsigned lod_preclamp:1; + unsigned default_color_mode:1; + unsigned pad0:1; + unsigned disable:1; } ss0; struct { - GLuint r_wrap_mode:3; - GLuint t_wrap_mode:3; - GLuint s_wrap_mode:3; - GLuint cube_control_mode:1; - GLuint pad:2; - GLuint max_lod:10; - GLuint min_lod:10; + unsigned r_wrap_mode:3; + unsigned t_wrap_mode:3; + unsigned s_wrap_mode:3; + unsigned cube_control_mode:1; + unsigned pad:2; + unsigned max_lod:10; + unsigned min_lod:10; } ss1; struct { - GLuint pad:5; - GLuint default_color_pointer:27; + unsigned pad:5; + unsigned default_color_pointer:27; } ss2; struct { - GLuint non_normalized_coord:1; - GLuint pad:12; - GLuint address_round:6; - GLuint max_aniso:3; - GLuint chroma_key_mode:1; - GLuint chroma_key_index:2; - GLuint chroma_key_enable:1; - GLuint monochrome_filter_width:3; - GLuint monochrome_filter_height:3; + unsigned non_normalized_coord:1; + unsigned pad:12; + unsigned address_round:6; + unsigned max_aniso:3; + unsigned chroma_key_mode:1; + unsigned chroma_key_index:2; + unsigned chroma_key_enable:1; + unsigned monochrome_filter_width:3; + unsigned monochrome_filter_height:3; } ss3; }; @@ -672,152 +666,152 @@ struct gen7_sampler_state { struct { - GLuint aniso_algorithm:1; - GLuint lod_bias:13; - GLuint min_filter:3; - GLuint mag_filter:3; - GLuint mip_filter:2; - GLuint base_level:5; - GLuint pad1:1; - GLuint lod_preclamp:1; - GLuint default_color_mode:1; - GLuint pad0:1; - GLuint disable:1; + unsigned aniso_algorithm:1; + unsigned lod_bias:13; + unsigned min_filter:3; + unsigned mag_filter:3; + unsigned mip_filter:2; + unsigned base_level:5; + unsigned pad1:1; + unsigned lod_preclamp:1; + unsigned default_color_mode:1; + unsigned pad0:1; + unsigned disable:1; } ss0; struct { - GLuint cube_control_mode:1; - GLuint shadow_function:3; - GLuint pad:4; - GLuint max_lod:12; - GLuint min_lod:12; + unsigned cube_control_mode:1; + unsigned shadow_function:3; + unsigned pad:4; + unsigned max_lod:12; + unsigned min_lod:12; } ss1; struct { - GLuint pad:5; - GLuint default_color_pointer:27; + unsigned pad:5; + unsigned default_color_pointer:27; } ss2; struct { - GLuint r_wrap_mode:3; - GLuint t_wrap_mode:3; - GLuint s_wrap_mode:3; - GLuint pad:1; - GLuint non_normalized_coord:1; - GLuint trilinear_quality:2; - GLuint address_round:6; - GLuint max_aniso:3; - GLuint chroma_key_mode:1; - GLuint chroma_key_index:2; - GLuint chroma_key_enable:1; - GLuint pad0:6; + unsigned r_wrap_mode:3; + unsigned t_wrap_mode:3; + unsigned s_wrap_mode:3; + unsigned pad:1; + unsigned non_normalized_coord:1; + unsigned trilinear_quality:2; + unsigned address_round:6; + unsigned max_aniso:3; + unsigned chroma_key_mode:1; + unsigned chroma_key_index:2; + unsigned chroma_key_enable:1; + unsigned pad0:6; } ss3; }; struct brw_clipper_viewport { - GLfloat xmin; - GLfloat xmax; - GLfloat ymin; - GLfloat ymax; + float xmin; + float xmax; + float ymin; + float ymax; }; struct brw_cc_viewport { - GLfloat min_depth; - GLfloat max_depth; + float min_depth; + float max_depth; }; struct brw_sf_viewport { struct { - GLfloat m00; - GLfloat m11; - GLfloat m22; - GLfloat m30; - GLfloat m31; - GLfloat m32; + float m00; + float m11; + float m22; + float m30; + float m31; + float m32; } viewport; /* scissor coordinates are inclusive */ struct { - GLshort xmin; - GLshort ymin; - GLshort xmax; - GLshort ymax; + int16_t xmin; + int16_t ymin; + int16_t xmax; + int16_t ymax; } scissor; }; struct gen6_sf_viewport { - GLfloat m00; - GLfloat m11; - GLfloat m22; - GLfloat m30; - GLfloat m31; - GLfloat m32; + float m00; + float m11; + float m22; + float m30; + float m31; + float m32; }; struct gen7_sf_clip_viewport { struct { - GLfloat m00; - GLfloat m11; - GLfloat m22; - GLfloat m30; - GLfloat m31; - GLfloat m32; + float m00; + float m11; + float m22; + float m30; + float m31; + float m32; } viewport; - GLuint pad0[2]; + unsigned pad0[2]; struct { - GLfloat xmin; - GLfloat xmax; - GLfloat ymin; - GLfloat ymax; + float xmin; + float xmax; + float ymin; + float ymax; } guardband; - GLfloat pad1[4]; + float pad1[4]; }; struct brw_vertex_element_state { struct { - GLuint src_offset:11; - GLuint pad:5; - GLuint src_format:9; - GLuint pad0:1; - GLuint valid:1; - GLuint vertex_buffer_index:5; + unsigned src_offset:11; + unsigned pad:5; + unsigned src_format:9; + unsigned pad0:1; + unsigned valid:1; + unsigned vertex_buffer_index:5; } ve0; struct { - GLuint dst_offset:8; - GLuint pad:8; - GLuint vfcomponent3:4; - GLuint vfcomponent2:4; - GLuint vfcomponent1:4; - GLuint vfcomponent0:4; + unsigned dst_offset:8; + unsigned pad:8; + unsigned vfcomponent3:4; + unsigned vfcomponent2:4; + unsigned vfcomponent1:4; + unsigned vfcomponent0:4; } ve1; }; struct brw_urb_immediate { - GLuint opcode:4; - GLuint offset:6; - GLuint swizzle_control:2; - GLuint pad:1; - GLuint allocate:1; - GLuint used:1; - GLuint complete:1; - GLuint response_length:4; - GLuint msg_length:4; - GLuint msg_target:4; - GLuint pad1:3; - GLuint end_of_thread:1; + unsigned opcode:4; + unsigned offset:6; + unsigned swizzle_control:2; + unsigned pad:1; + unsigned allocate:1; + unsigned used:1; + unsigned complete:1; + unsigned response_length:4; + unsigned msg_length:4; + unsigned msg_target:4; + unsigned pad1:3; + unsigned end_of_thread:1; }; /* Instruction format for the execution units: @@ -827,119 +821,119 @@ struct brw_instruction { struct { - GLuint opcode:7; - GLuint pad:1; - GLuint access_mode:1; - GLuint mask_control:1; - GLuint dependency_control:2; - GLuint compression_control:2; /* gen6: quater control */ - GLuint thread_control:2; - GLuint predicate_control:4; - GLuint predicate_inverse:1; - GLuint execution_size:3; + unsigned opcode:7; + unsigned pad:1; + unsigned access_mode:1; + unsigned mask_control:1; + unsigned dependency_control:2; + unsigned compression_control:2; /* gen6: quater control */ + unsigned thread_control:2; + unsigned predicate_control:4; + unsigned predicate_inverse:1; + unsigned execution_size:3; /** * Conditional Modifier for most instructions. On Gen6+, this is also * used for the SEND instruction's Message Target/SFID. */ - GLuint destreg__conditionalmod:4; - GLuint acc_wr_control:1; - GLuint cmpt_control:1; - GLuint debug_control:1; - GLuint saturate:1; + unsigned destreg__conditionalmod:4; + unsigned acc_wr_control:1; + unsigned cmpt_control:1; + unsigned debug_control:1; + unsigned saturate:1; } header; union { struct { - GLuint dest_reg_file:2; - GLuint dest_reg_type:3; - GLuint src0_reg_file:2; - GLuint src0_reg_type:3; - GLuint src1_reg_file:2; - GLuint src1_reg_type:3; - GLuint pad:1; - GLuint dest_subreg_nr:5; - GLuint dest_reg_nr:8; - GLuint dest_horiz_stride:2; - GLuint dest_address_mode:1; + unsigned dest_reg_file:2; + unsigned dest_reg_type:3; + unsigned src0_reg_file:2; + unsigned src0_reg_type:3; + unsigned src1_reg_file:2; + unsigned src1_reg_type:3; + unsigned pad:1; + unsigned dest_subreg_nr:5; + unsigned dest_reg_nr:8; + unsigned dest_horiz_stride:2; + unsigned dest_address_mode:1; } da1; struct { - GLuint dest_reg_file:2; - GLuint dest_reg_type:3; - GLuint src0_reg_file:2; - GLuint src0_reg_type:3; - GLuint src1_reg_file:2; /* 0x00000c00 */ - GLuint src1_reg_type:3; /* 0x00007000 */ - GLuint pad:1; - GLint dest_indirect_offset:10; /* offset against the deref'd address reg */ - GLuint dest_subreg_nr:3; /* subnr for the address reg a0.x */ - GLuint dest_horiz_stride:2; - GLuint dest_address_mode:1; + unsigned dest_reg_file:2; + unsigned dest_reg_type:3; + unsigned src0_reg_file:2; + unsigned src0_reg_type:3; + unsigned src1_reg_file:2; /* 0x00000c00 */ + unsigned src1_reg_type:3; /* 0x00007000 */ + unsigned pad:1; + int dest_indirect_offset:10; /* offset against the deref'd address reg */ + unsigned dest_subreg_nr:3; /* subnr for the address reg a0.x */ + unsigned dest_horiz_stride:2; + unsigned dest_address_mode:1; } ia1; struct { - GLuint dest_reg_file:2; - GLuint dest_reg_type:3; - GLuint src0_reg_file:2; - GLuint src0_reg_type:3; - GLuint src1_reg_file:2; - GLuint src1_reg_type:3; - GLuint pad:1; - GLuint dest_writemask:4; - GLuint dest_subreg_nr:1; - GLuint dest_reg_nr:8; - GLuint dest_horiz_stride:2; - GLuint dest_address_mode:1; + unsigned dest_reg_file:2; + unsigned dest_reg_type:3; + unsigned src0_reg_file:2; + unsigned src0_reg_type:3; + unsigned src1_reg_file:2; + unsigned src1_reg_type:3; + unsigned pad:1; + unsigned dest_writemask:4; + unsigned dest_subreg_nr:1; + unsigned dest_reg_nr:8; + unsigned dest_horiz_stride:2; + unsigned dest_address_mode:1; } da16; struct { - GLuint dest_reg_file:2; - GLuint dest_reg_type:3; - GLuint src0_reg_file:2; - GLuint src0_reg_type:3; - GLuint pad0:6; - GLuint dest_writemask:4; - GLint dest_indirect_offset:6; - GLuint dest_subreg_nr:3; - GLuint dest_horiz_stride:2; - GLuint dest_address_mode:1; + unsigned dest_reg_file:2; + unsigned dest_reg_type:3; + unsigned src0_reg_file:2; + unsigned src0_reg_type:3; + unsigned pad0:6; + unsigned dest_writemask:4; + int dest_indirect_offset:6; + unsigned dest_subreg_nr:3; + unsigned dest_horiz_stride:2; + unsigned dest_address_mode:1; } ia16; struct { - GLuint dest_reg_file:2; - GLuint dest_reg_type:3; - GLuint src0_reg_file:2; - GLuint src0_reg_type:3; - GLuint src1_reg_file:2; - GLuint src1_reg_type:3; - GLuint pad:1; - - GLint jump_count:16; + unsigned dest_reg_file:2; + unsigned dest_reg_type:3; + unsigned src0_reg_file:2; + unsigned src0_reg_type:3; + unsigned src1_reg_file:2; + unsigned src1_reg_type:3; + unsigned pad:1; + + int jump_count:16; } branch_gen6; struct { - GLuint dest_reg_file:1; - GLuint flag_subreg_nr:1; - GLuint flag_reg_nr:1; - GLuint pad0:1; - GLuint src0_abs:1; - GLuint src0_negate:1; - GLuint src1_abs:1; - GLuint src1_negate:1; - GLuint src2_abs:1; - GLuint src2_negate:1; - GLuint src_reg_type:2; - GLuint dest_reg_type:2; - GLuint pad1:1; - GLuint nib_ctrl:1; - GLuint pad2:1; - GLuint dest_writemask:4; - GLuint dest_subreg_nr:3; - GLuint dest_reg_nr:8; + unsigned dest_reg_file:1; + unsigned flag_subreg_nr:1; + unsigned flag_reg_nr:1; + unsigned pad0:1; + unsigned src0_abs:1; + unsigned src0_negate:1; + unsigned src1_abs:1; + unsigned src1_negate:1; + unsigned src2_abs:1; + unsigned src2_negate:1; + unsigned src_reg_type:2; + unsigned dest_reg_type:2; + unsigned pad1:1; + unsigned nib_ctrl:1; + unsigned pad2:1; + unsigned dest_writemask:4; + unsigned dest_subreg_nr:3; + unsigned dest_reg_nr:8; } da3src; uint32_t ud; @@ -949,68 +943,68 @@ struct brw_instruction union { struct { - GLuint src0_subreg_nr:5; - GLuint src0_reg_nr:8; - GLuint src0_abs:1; - GLuint src0_negate:1; - GLuint src0_address_mode:1; - GLuint src0_horiz_stride:2; - GLuint src0_width:3; - GLuint src0_vert_stride:4; - GLuint flag_subreg_nr:1; - GLuint flag_reg_nr:1; - GLuint pad:5; + unsigned src0_subreg_nr:5; + unsigned src0_reg_nr:8; + unsigned src0_abs:1; + unsigned src0_negate:1; + unsigned src0_address_mode:1; + unsigned src0_horiz_stride:2; + unsigned src0_width:3; + unsigned src0_vert_stride:4; + unsigned flag_subreg_nr:1; + unsigned flag_reg_nr:1; + unsigned pad:5; } da1; struct { - GLint src0_indirect_offset:10; - GLuint src0_subreg_nr:3; - GLuint src0_abs:1; - GLuint src0_negate:1; - GLuint src0_address_mode:1; - GLuint src0_horiz_stride:2; - GLuint src0_width:3; - GLuint src0_vert_stride:4; - GLuint flag_subreg_nr:1; - GLuint flag_reg_nr:1; - GLuint pad:5; + int src0_indirect_offset:10; + unsigned src0_subreg_nr:3; + unsigned src0_abs:1; + unsigned src0_negate:1; + unsigned src0_address_mode:1; + unsigned src0_horiz_stride:2; + unsigned src0_width:3; + unsigned src0_vert_stride:4; + unsigned flag_subreg_nr:1; + unsigned flag_reg_nr:1; + unsigned pad:5; } ia1; struct { - GLuint src0_swz_x:2; - GLuint src0_swz_y:2; - GLuint src0_subreg_nr:1; - GLuint src0_reg_nr:8; - GLuint src0_abs:1; - GLuint src0_negate:1; - GLuint src0_address_mode:1; - GLuint src0_swz_z:2; - GLuint src0_swz_w:2; - GLuint pad0:1; - GLuint src0_vert_stride:4; - GLuint flag_subreg_nr:1; - GLuint flag_reg_nr:1; - GLuint pad1:5; + unsigned src0_swz_x:2; + unsigned src0_swz_y:2; + unsigned src0_subreg_nr:1; + unsigned src0_reg_nr:8; + unsigned src0_abs:1; + unsigned src0_negate:1; + unsigned src0_address_mode:1; + unsigned src0_swz_z:2; + unsigned src0_swz_w:2; + unsigned pad0:1; + unsigned src0_vert_stride:4; + unsigned flag_subreg_nr:1; + unsigned flag_reg_nr:1; + unsigned pad1:5; } da16; struct { - GLuint src0_swz_x:2; - GLuint src0_swz_y:2; - GLint src0_indirect_offset:6; - GLuint src0_subreg_nr:3; - GLuint src0_abs:1; - GLuint src0_negate:1; - GLuint src0_address_mode:1; - GLuint src0_swz_z:2; - GLuint src0_swz_w:2; - GLuint pad0:1; - GLuint src0_vert_stride:4; - GLuint flag_subreg_nr:1; - GLuint flag_reg_nr:1; - GLuint pad1:5; + unsigned src0_swz_x:2; + unsigned src0_swz_y:2; + int src0_indirect_offset:6; + unsigned src0_subreg_nr:3; + unsigned src0_abs:1; + unsigned src0_negate:1; + unsigned src0_address_mode:1; + unsigned src0_swz_z:2; + unsigned src0_swz_w:2; + unsigned pad0:1; + unsigned src0_vert_stride:4; + unsigned flag_subreg_nr:1; + unsigned flag_reg_nr:1; + unsigned pad1:5; } ia16; /* Extended Message Descriptor for Ironlake (Gen5) SEND instruction. @@ -1020,21 +1014,21 @@ struct brw_instruction */ struct { - GLuint pad:26; - GLuint end_of_thread:1; - GLuint pad1:1; - GLuint sfid:4; + unsigned pad:26; + unsigned end_of_thread:1; + unsigned pad1:1; + unsigned sfid:4; } send_gen5; /* for Ironlake only */ struct { - GLuint src0_rep_ctrl:1; - GLuint src0_swizzle:8; - GLuint src0_subreg_nr:3; - GLuint src0_reg_nr:8; - GLuint pad0:1; - GLuint src1_rep_ctrl:1; - GLuint src1_swizzle:8; - GLuint src1_subreg_nr_low:2; + unsigned src0_rep_ctrl:1; + unsigned src0_swizzle:8; + unsigned src0_subreg_nr:3; + unsigned src0_reg_nr:8; + unsigned pad0:1; + unsigned src1_rep_ctrl:1; + unsigned src1_swizzle:8; + unsigned src1_subreg_nr_low:2; } da3src; uint32_t ud; @@ -1044,68 +1038,68 @@ struct brw_instruction { struct { - GLuint src1_subreg_nr:5; - GLuint src1_reg_nr:8; - GLuint src1_abs:1; - GLuint src1_negate:1; - GLuint src1_address_mode:1; - GLuint src1_horiz_stride:2; - GLuint src1_width:3; - GLuint src1_vert_stride:4; - GLuint pad0:7; + unsigned src1_subreg_nr:5; + unsigned src1_reg_nr:8; + unsigned src1_abs:1; + unsigned src1_negate:1; + unsigned src1_address_mode:1; + unsigned src1_horiz_stride:2; + unsigned src1_width:3; + unsigned src1_vert_stride:4; + unsigned pad0:7; } da1; struct { - GLuint src1_swz_x:2; - GLuint src1_swz_y:2; - GLuint src1_subreg_nr:1; - GLuint src1_reg_nr:8; - GLuint src1_abs:1; - GLuint src1_negate:1; - GLuint src1_address_mode:1; - GLuint src1_swz_z:2; - GLuint src1_swz_w:2; - GLuint pad1:1; - GLuint src1_vert_stride:4; - GLuint pad2:7; + unsigned src1_swz_x:2; + unsigned src1_swz_y:2; + unsigned src1_subreg_nr:1; + unsigned src1_reg_nr:8; + unsigned src1_abs:1; + unsigned src1_negate:1; + unsigned src1_address_mode:1; + unsigned src1_swz_z:2; + unsigned src1_swz_w:2; + unsigned pad1:1; + unsigned src1_vert_stride:4; + unsigned pad2:7; } da16; struct { - GLint src1_indirect_offset:10; - GLuint src1_subreg_nr:3; - GLuint src1_abs:1; - GLuint src1_negate:1; - GLuint src1_address_mode:1; - GLuint src1_horiz_stride:2; - GLuint src1_width:3; - GLuint src1_vert_stride:4; - GLuint pad1:7; + int src1_indirect_offset:10; + unsigned src1_subreg_nr:3; + unsigned src1_abs:1; + unsigned src1_negate:1; + unsigned src1_address_mode:1; + unsigned src1_horiz_stride:2; + unsigned src1_width:3; + unsigned src1_vert_stride:4; + unsigned pad1:7; } ia1; struct { - GLuint src1_swz_x:2; - GLuint src1_swz_y:2; - GLint src1_indirect_offset:6; - GLuint src1_subreg_nr:3; - GLuint src1_abs:1; - GLuint src1_negate:1; - GLuint src1_address_mode:1; - GLuint src1_swz_z:2; - GLuint src1_swz_w:2; - GLuint pad1:1; - GLuint src1_vert_stride:4; - GLuint pad2:7; + unsigned src1_swz_x:2; + unsigned src1_swz_y:2; + int src1_indirect_offset:6; + unsigned src1_subreg_nr:3; + unsigned src1_abs:1; + unsigned src1_negate:1; + unsigned src1_address_mode:1; + unsigned src1_swz_z:2; + unsigned src1_swz_w:2; + unsigned pad1:1; + unsigned src1_vert_stride:4; + unsigned pad2:7; } ia16; struct { - GLint jump_count:16; /* note: signed */ - GLuint pop_count:4; - GLuint pad0:12; + int jump_count:16; /* note: signed */ + unsigned pop_count:4; + unsigned pad0:12; } if_else; /* This is also used for gen7 IF/ELSE instructions */ @@ -1124,7 +1118,7 @@ struct brw_instruction int uip:16; } break_cont; - GLint JIP; /* used by Gen6 CALL instructions; Gen7 JMPI */ + int JIP; /* used by Gen6 CALL instructions; Gen7 JMPI */ /** * \defgroup SEND instructions / Message Descriptors @@ -1140,12 +1134,12 @@ struct brw_instruction * See the G45 PRM, Volume 4, Table 14-15. */ struct { - GLuint function_control:16; - GLuint response_length:4; - GLuint msg_length:4; - GLuint msg_target:4; - GLuint pad1:3; - GLuint end_of_thread:1; + unsigned function_control:16; + unsigned response_length:4; + unsigned msg_length:4; + unsigned msg_target:4; + unsigned pad1:3; + unsigned end_of_thread:1; } generic; /** @@ -1161,238 +1155,238 @@ struct brw_instruction * bit 127 of the instruction word"...which is bit 31 of this field. */ struct { - GLuint function_control:19; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad1:2; - GLuint end_of_thread:1; + unsigned function_control:19; + unsigned header_present:1; + unsigned response_length:5; + unsigned msg_length:4; + unsigned pad1:2; + unsigned end_of_thread:1; } generic_gen5; struct { - GLuint opcode:1; - GLuint requester_type:1; - GLuint pad:2; - GLuint resource_select:1; - GLuint pad1:11; - GLuint response_length:4; - GLuint msg_length:4; - GLuint msg_target:4; - GLuint pad2:3; - GLuint end_of_thread:1; + unsigned opcode:1; + unsigned requester_type:1; + unsigned pad:2; + unsigned resource_select:1; + unsigned pad1:11; + unsigned response_length:4; + unsigned msg_length:4; + unsigned msg_target:4; + unsigned pad2:3; + unsigned end_of_thread:1; } thread_spawner; struct { - GLuint opcode:1; - GLuint requester_type:1; - GLuint pad0:2; - GLuint resource_select:1; - GLuint pad1:14; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad2:2; - GLuint end_of_thread:1; + unsigned opcode:1; + unsigned requester_type:1; + unsigned pad0:2; + unsigned resource_select:1; + unsigned pad1:14; + unsigned header_present:1; + unsigned response_length:5; + unsigned msg_length:4; + unsigned pad2:2; + unsigned end_of_thread:1; } thread_spawner_gen5; /** G45 PRM, Volume 4, Section 6.1.1.1 */ struct { - GLuint function:4; - GLuint int_type:1; - GLuint precision:1; - GLuint saturate:1; - GLuint data_type:1; - GLuint pad0:8; - GLuint response_length:4; - GLuint msg_length:4; - GLuint msg_target:4; - GLuint pad1:3; - GLuint end_of_thread:1; + unsigned function:4; + unsigned int_type:1; + unsigned precision:1; + unsigned saturate:1; + unsigned data_type:1; + unsigned pad0:8; + unsigned response_length:4; + unsigned msg_length:4; + unsigned msg_target:4; + unsigned pad1:3; + unsigned end_of_thread:1; } math; /** Ironlake PRM, Volume 4 Part 1, Section 6.1.1.1 */ struct { - GLuint function:4; - GLuint int_type:1; - GLuint precision:1; - GLuint saturate:1; - GLuint data_type:1; - GLuint snapshot:1; - GLuint pad0:10; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad1:2; - GLuint end_of_thread:1; + unsigned function:4; + unsigned int_type:1; + unsigned precision:1; + unsigned saturate:1; + unsigned data_type:1; + unsigned snapshot:1; + unsigned pad0:10; + unsigned header_present:1; + unsigned response_length:5; + unsigned msg_length:4; + unsigned pad1:2; + unsigned end_of_thread:1; } math_gen5; /** G45 PRM, Volume 4, Section 4.8.1.1.1 [DevBW] and [DevCL] */ struct { - GLuint binding_table_index:8; - GLuint sampler:4; - GLuint return_format:2; - GLuint msg_type:2; - GLuint response_length:4; - GLuint msg_length:4; - GLuint msg_target:4; - GLuint pad1:3; - GLuint end_of_thread:1; + unsigned binding_table_index:8; + unsigned sampler:4; + unsigned return_format:2; + unsigned msg_type:2; + unsigned response_length:4; + unsigned msg_length:4; + unsigned msg_target:4; + unsigned pad1:3; + unsigned end_of_thread:1; } sampler; /** G45 PRM, Volume 4, Section 4.8.1.1.2 [DevCTG] */ struct { - GLuint binding_table_index:8; - GLuint sampler:4; - GLuint msg_type:4; - GLuint response_length:4; - GLuint msg_length:4; - GLuint msg_target:4; - GLuint pad1:3; - GLuint end_of_thread:1; + unsigned binding_table_index:8; + unsigned sampler:4; + unsigned msg_type:4; + unsigned response_length:4; + unsigned msg_length:4; + unsigned msg_target:4; + unsigned pad1:3; + unsigned end_of_thread:1; } sampler_g4x; /** Ironlake PRM, Volume 4 Part 1, Section 4.11.1.1.3 */ struct { - GLuint binding_table_index:8; - GLuint sampler:4; - GLuint msg_type:4; - GLuint simd_mode:2; - GLuint pad0:1; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad1:2; - GLuint end_of_thread:1; + unsigned binding_table_index:8; + unsigned sampler:4; + unsigned msg_type:4; + unsigned simd_mode:2; + unsigned pad0:1; + unsigned header_present:1; + unsigned response_length:5; + unsigned msg_length:4; + unsigned pad1:2; + unsigned end_of_thread:1; } sampler_gen5; struct { - GLuint binding_table_index:8; - GLuint sampler:4; - GLuint msg_type:5; - GLuint simd_mode:2; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad1:2; - GLuint end_of_thread:1; + unsigned binding_table_index:8; + unsigned sampler:4; + unsigned msg_type:5; + unsigned simd_mode:2; + unsigned header_present:1; + unsigned response_length:5; + unsigned msg_length:4; + unsigned pad1:2; + unsigned end_of_thread:1; } sampler_gen7; struct brw_urb_immediate urb; struct { - GLuint opcode:4; - GLuint offset:6; - GLuint swizzle_control:2; - GLuint pad:1; - GLuint allocate:1; - GLuint used:1; - GLuint complete:1; - GLuint pad0:3; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad1:2; - GLuint end_of_thread:1; + unsigned opcode:4; + unsigned offset:6; + unsigned swizzle_control:2; + unsigned pad:1; + unsigned allocate:1; + unsigned used:1; + unsigned complete:1; + unsigned pad0:3; + unsigned header_present:1; + unsigned response_length:5; + unsigned msg_length:4; + unsigned pad1:2; + unsigned end_of_thread:1; } urb_gen5; struct { - GLuint opcode:3; - GLuint offset:11; - GLuint swizzle_control:1; - GLuint complete:1; - GLuint per_slot_offset:1; - GLuint pad0:2; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad1:2; - GLuint end_of_thread:1; + unsigned opcode:3; + unsigned offset:11; + unsigned swizzle_control:1; + unsigned complete:1; + unsigned per_slot_offset:1; + unsigned pad0:2; + unsigned header_present:1; + unsigned response_length:5; + unsigned msg_length:4; + unsigned pad1:2; + unsigned end_of_thread:1; } urb_gen7; struct { - GLuint binding_table_index:8; - GLuint search_path_index:3; - GLuint lut_subindex:2; - GLuint message_type:2; - GLuint pad0:4; - GLuint header_present:1; + unsigned binding_table_index:8; + unsigned search_path_index:3; + unsigned lut_subindex:2; + unsigned message_type:2; + unsigned pad0:4; + unsigned header_present:1; } vme_gen6; struct { - GLuint binding_table_index:8; - GLuint pad0:5; - GLuint message_type:2; - GLuint pad1:4; - GLuint header_present:1; + unsigned binding_table_index:8; + unsigned pad0:5; + unsigned message_type:2; + unsigned pad1:4; + unsigned header_present:1; } cre_gen75; /** 965 PRM, Volume 4, Section 5.10.1.1: Message Descriptor */ struct { - GLuint binding_table_index:8; - GLuint msg_control:4; - GLuint msg_type:2; - GLuint target_cache:2; - GLuint response_length:4; - GLuint msg_length:4; - GLuint msg_target:4; - GLuint pad1:3; - GLuint end_of_thread:1; + unsigned binding_table_index:8; + unsigned msg_control:4; + unsigned msg_type:2; + unsigned target_cache:2; + unsigned response_length:4; + unsigned msg_length:4; + unsigned msg_target:4; + unsigned pad1:3; + unsigned end_of_thread:1; } dp_read; /** G45 PRM, Volume 4, Section 5.10.1.1.2 */ struct { - GLuint binding_table_index:8; - GLuint msg_control:3; - GLuint msg_type:3; - GLuint target_cache:2; - GLuint response_length:4; - GLuint msg_length:4; - GLuint msg_target:4; - GLuint pad1:3; - GLuint end_of_thread:1; + unsigned binding_table_index:8; + unsigned msg_control:3; + unsigned msg_type:3; + unsigned target_cache:2; + unsigned response_length:4; + unsigned msg_length:4; + unsigned msg_target:4; + unsigned pad1:3; + unsigned end_of_thread:1; } dp_read_g4x; /** Ironlake PRM, Volume 4 Part 1, Section 5.10.2.1.2. */ struct { - GLuint binding_table_index:8; - GLuint msg_control:4; - GLuint msg_type:2; - GLuint target_cache:2; - GLuint pad0:3; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad1:2; - GLuint end_of_thread:1; + unsigned binding_table_index:8; + unsigned msg_control:4; + unsigned msg_type:2; + unsigned target_cache:2; + unsigned pad0:3; + unsigned header_present:1; + unsigned response_length:5; + unsigned msg_length:4; + unsigned pad1:2; + unsigned end_of_thread:1; } dp_read_gen5; /** G45 PRM, Volume 4, Section 5.10.1.1.2. For both Gen4 and G45. */ struct { - GLuint binding_table_index:8; - GLuint msg_control:3; - GLuint last_render_target:1; - GLuint msg_type:3; - GLuint send_commit_msg:1; - GLuint response_length:4; - GLuint msg_length:4; - GLuint msg_target:4; - GLuint pad1:3; - GLuint end_of_thread:1; + unsigned binding_table_index:8; + unsigned msg_control:3; + unsigned last_render_target:1; + unsigned msg_type:3; + unsigned send_commit_msg:1; + unsigned response_length:4; + unsigned msg_length:4; + unsigned msg_target:4; + unsigned pad1:3; + unsigned end_of_thread:1; } dp_write; /** Ironlake PRM, Volume 4 Part 1, Section 5.10.2.1.2. */ struct { - GLuint binding_table_index:8; - GLuint msg_control:3; - GLuint last_render_target:1; - GLuint msg_type:3; - GLuint send_commit_msg:1; - GLuint pad0:3; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad1:2; - GLuint end_of_thread:1; + unsigned binding_table_index:8; + unsigned msg_control:3; + unsigned last_render_target:1; + unsigned msg_type:3; + unsigned send_commit_msg:1; + unsigned pad0:3; + unsigned header_present:1; + unsigned response_length:5; + unsigned msg_length:4; + unsigned pad1:2; + unsigned end_of_thread:1; } dp_write_gen5; /** @@ -1401,15 +1395,15 @@ struct brw_instruction * See the Sandybridge PRM, Volume 4 Part 1, Section 3.9.2.1.1. **/ struct { - GLuint binding_table_index:8; - GLuint msg_control:5; - GLuint msg_type:3; - GLuint pad0:3; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad1:2; - GLuint end_of_thread:1; + unsigned binding_table_index:8; + unsigned msg_control:5; + unsigned msg_type:3; + unsigned pad0:3; + unsigned header_present:1; + unsigned response_length:5; + unsigned msg_length:4; + unsigned pad1:2; + unsigned end_of_thread:1; } gen6_dp_sampler_const_cache; /** @@ -1423,16 +1417,16 @@ struct brw_instruction * Section 3.9.9.2.1 of the same volume. */ struct { - GLuint binding_table_index:8; - GLuint msg_control:5; - GLuint msg_type:4; - GLuint send_commit_msg:1; - GLuint pad0:1; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad1:2; - GLuint end_of_thread:1; + unsigned binding_table_index:8; + unsigned msg_control:5; + unsigned msg_type:4; + unsigned send_commit_msg:1; + unsigned pad0:1; + unsigned header_present:1; + unsigned response_length:5; + unsigned msg_length:4; + unsigned pad1:2; + unsigned end_of_thread:1; } gen6_dp; /** @@ -1444,31 +1438,31 @@ struct brw_instruction * control for Render Target Writes. */ struct { - GLuint binding_table_index:8; - GLuint msg_control:6; - GLuint msg_type:4; - GLuint category:1; - GLuint header_present:1; - GLuint response_length:5; - GLuint msg_length:4; - GLuint pad2:2; - GLuint end_of_thread:1; + unsigned binding_table_index:8; + unsigned msg_control:6; + unsigned msg_type:4; + unsigned category:1; + unsigned header_present:1; + unsigned response_length:5; + unsigned msg_length:4; + unsigned pad2:2; + unsigned end_of_thread:1; } gen7_dp; /** @} */ struct { - GLuint src1_subreg_nr_high:1; - GLuint src1_reg_nr:8; - GLuint pad0:1; - GLuint src2_rep_ctrl:1; - GLuint src2_swizzle:8; - GLuint src2_subreg_nr:3; - GLuint src2_reg_nr:8; - GLuint pad1:2; + unsigned src1_subreg_nr_high:1; + unsigned src1_reg_nr:8; + unsigned pad0:1; + unsigned src2_rep_ctrl:1; + unsigned src2_swizzle:8; + unsigned src2_subreg_nr:3; + unsigned src2_reg_nr:8; + unsigned pad1:2; } da3src; - GLint d; - GLuint ud; + int d; + unsigned ud; float f; } bits3; }; |