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Unify the MOCS to be more consistently across the platforms.
Currently gen8+ are specifyig UC whereas earlier platforms
generally use PTE. Let's make everyone more or less specify
L3+PTE.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Dropping duplicated definitions of registers,fields
and shiftsm, which were implemented in gen4 and
does not changed in gen6.
v3: Rebase
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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Instead of using definitions duplicated in gen7_render header,
we should use the oldest definition that is working with chosen
gen. This patch reuse gen6 definitons if registers/fields/shifts
that were introduced in other genX_render headers.
v3: Rebase and checkpatch
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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Patch is removing all duplicated definitions of
SURFACEFORMAT from few lib headers
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
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In several header files surface formats definitions were
duplicated. To decrease amount of duplicated code in igt
new lib was created.
v2: Drop GEN_ from registers definition
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Radoslaw Szwichtenberg <radoslaw.szwichtenberg@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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This patch applies coding standard into gen6_render library.
No functional changes were made.
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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This patch is reordering registers and related shifts/fields
to be in one place and also is sorting registers definitions
in an ascending order by it memory address.
v4: Fixed missing values and corrected commit message
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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Remove duplicated registers, shifts and values from lib.
Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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Previously we didn't have a clear understanding what is necessary
for a pipeline state to be properly initialized. So we had to improvise
and use a stripped out render copy.
Now we have a more clear understanding so switch out render copy based
frankenstate to state we can call golden state.
v2: - export intel_batch_state_offset
- add 3DSTATE_RASTER (Bradley Volkin)
Cc: Volkin, Bradley D <bradley.d.volkin@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
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We dont use this pre CTG and we will need it for gen8 golden state.
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
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No functional changes
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
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Textually the same so no harm was done and no warnings
from compiler either.
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
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Generate valid (null) render state for each gen. Output
it as a c source file with batch and relocations.
v2: noinst and vs_start fixed for BDW GT3 (Damien Lespiau)
Acked-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
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Only include what the header itself needs. The big fish here is
intel-gpu-tools.h. More will follow.
One ugly thing removed here is the duplicated GEN6_TD_CTL #define, one
of which was broken.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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Instead of assuming someone else will do it.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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