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The test wrote to the same dwords from multiple contexts, assuming that
the writes would be ordered by its submission. However, as it was using
multiple contexts without a write hazard, those timelines are not
coupled and the requests may be emitted to hw in any order. So emit a
write hazard for each individual dword in the scratch (avoiding the
write hazard for the scratch as a whole) to ensure the writes do occur
in the expected order.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Consistent with other function signatures in the file.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Jose Roberto de Souza <jose.souza@intel.com>
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After the initial plane setup, only the test plane is required. One
exception is clean_up where the primary is required, but a call to
igt_output_get_plane_type() can get us that.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Jose Roberto de Souza <jose.souza@intel.com>
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Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Jose Roberto de Souza <jose.souza@intel.com>
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The CRC values are useful as a reference to compare them with values
generated from other feature (PSR) tests.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Jose Roberto de Souza <jose.souza@intel.com>
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The goal of this test is (or should be) to verify DRRS is disabled if PSR
was enabled. There is no point in checking for DRRS status if PSR was not
enabled in the first place.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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No reason for the delay between dpms off and on.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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I don't see a big difference in what {dpms,suspend}_psr_exit and
{dpms_off, suspend}_psr_active tests uniquely achieve. Combine them so
that we have one dpms and one suspend test.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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No PSR event should take 10s, don't see value in this test.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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Eliminate three memcpy's and four sscanf's.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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Include minor fomatting change too.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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It will be reused to enable PSR debug in the later patches.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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psr_active() checks the debugfs flag "HW Enabled & Active bit", which only
tells us if PSR was enabled by the driver. The state of PSR - active
or inactive is different from this flag for DDI platforms, so rename the
function appropriately.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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And rename psr_drrs to no_drrs.
Makes the name consistent with other tests.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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And rename the function to match what it does.
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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trigger_reset() imposes a tight time constraint (2s) so that we verify
that the reset itself completes quickly. In the middle of this check, we
call gem_quiescent_gpu() which may invoke an rcu_barrier() or two to
clear out the freed memory (DROP_FREED). Those barriers may have
unbounded latency pushing beyond the 2s timeout, so restrict the
operation to only wait-for-idle (DROP_ACTIVE).
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105957
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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If we trigger "too many" resets, the context and even the file, will be
banned and subsequent execbufs should fail with -EIO.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Check that the kernel rejects a zero user_size.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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The timeout for PC8+ residency change is lowered to 30s. During testing
the entry always happened in ~10s, so thrice that should be a safe bet.
(active USB keyboard, network and screen, no powertop --auto-tune)
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Martin Peres <martin.peres@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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On some devices BIOS limits possible Package C-states via setting one of
the MSRs. The test now skips if the limit is set to a shallower PC-state
than PC8.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Martin Peres <martin.peres@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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CS flips no longer exist, so the test has become useless.
Other tests like kms_busy already perform some testing
that's gpu agnostic.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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When waiting for a finite batch, all that we require is that the batch
completes. If it takes the full second (or longer) for us to wake up and
notice the completed batch is immaterial, so only assert that we don't
report an infinite timeout afterwards.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
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Execute the same batch on each engine and check that the composite fence
across all engines completes only after the batch is completed on every
engine.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Antonio Argenziano <antonio.argenziano@intel.com>
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Our parent is RT, we are not. In theory, we should wait until our parent
has gone to sleep before we are allowed to proceed (we should both be
bound to the same cpu). Double down on this by sleeping in the child
until our parent has written a byte along a pipe().
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Make the property validation more thorough:
- validate property flags
- make sure there's an expected number of values/enums
- make sure the possible values make sense
- make sure the current value makes sense
- actually iterate through all planes/crtc/connectors to
check their properties
- make sure encoders don't expose properties while at it
- check that atomic props aren't exposed to non-atomic clients
Still passes on my ivb. Not tested anything else so far.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
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In the existing ABI, each engine operates its own timeline
(fence.context) and so should execute independently of any other. If we
install a blocker on all other engines, that should not affect execution
on the local engine.
v2: Move the requirements checks from the fixture to subtest so that
the test list is stable (Antonio)
v3: Protect SNB from the evil MI_STORE_DWORD.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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I have a cunning plan to make the vma open/close lazy to cache frequent
reallocations (as buffers are passed between applications, e.g. DRI).
However, this will mean that we will not be immediately closing vma and
so need to tell the kernel to process the idle handlers before checking
for leaks.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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The amdgpu tests in tests/amdgpu got installed directly into
$libexecdir before, but test-list.txt still referred to them as
amdgpu/$testname.
This fixes running scripts/run-tests.sh -l with the install directory
as IGT_TEST_ROOT and, I can imagine, actually running them from
install directory (untested). It also removes one FIXME comment for an
internet point.
Signed-off-by: Petri Latvala <petri.latvala@intel.com>
Cc: Tomi Sarvela <tomi.p.sarvela@intel.com>
Reviewed-by: Katarzyna Dec <katarzyna.dec@intel.com>
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In investigating the issue with having to force preemption within the
executing ELSP[], we want to trigger preemption between all elements of
that array. To that end, we issue a series of requests with different
priorities to fill the in-flight ELSP[] and then demand preemption into
the middle of that series. One can think of even more complicated
reordering requirements of ELSP[], trying to switch between every
possible combination of permutations. Rather than check all 2 billion
combinations, be content with a few.
v2: Add a different pattern for queued requests. Not only do we need to
inject a request into the middle of a single context with a queue of
different priority contexts, but we also want a queue of different
contexts, as they have different patterns of ELSP[] behaviour.
v3: Fixup the naming clash from copy'n'pasting
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Cc: Michał Winiarski <michal.winiarski@intel.com>
Reviewed-by: Michał Winiarski <michal.winiarski@intel.com>
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Before we start trying to use userptr to test interoperability with
PRIME, we first need to check that the device in question has userptr
support.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106013
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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Depending on the default mode size, some tests will fail because it
will exceed the maximum size that hardware tracking can handle,
mostly because hardware tracking do not take in care the X and Y
offsets, so the plane size + offsets needs be smaller or equal to
hardware tracking limmits.
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105680
Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
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Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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Masking assumes a direct relationship between the software LUT
structure, and hardware LUT. This is not always the case.
On AMD hardware for example, the hardware LUT is composed of
piecewise-linear segments, with end-point spaced exponentially along the
X axis, while software LUT is spaced linearly. Masking the LUT for the
purpose of truncating the resulting colors won't work here.
v2: Add commit message and sign off.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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Fill entire frame to avoid garbage data from being included in CRC
calculations.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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Modesetting requires DRM_MASTER privileges, so use
drm_open_driver_master() to assert that we do acquire them.
References: https://bugs.freedesktop.org/show_bug.cgi?id=105997
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
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When running a single subtest, outstanding work might hang after the test
ends therefore escaping detection by the hang_detector.
v2:
- Update commit message. (Chris)
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Realtime scheduling interferes with execlists submission (tasklet) so try
to simplify the PWM loop in a few ways:
* Drop RT.
* Longer batches for smaller systematic error.
* More truthful test duration calculation.
* Less clock queries.
* No self-adjust - instead just report the achieved cycle and let the
parent check against it.
* Report absolute cycle error.
v2:
* Bring back self-adjust. (Chris Wilson)
(But slightly fixed version with no overflow.)
v3:
* Log average and mean calibration for each pass.
v4:
* Eliminate development leftovers.
* Fix variance logging.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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The kms_frontbuffer_tracking@*suspend subtests spend 20 seconds
sleeping around igt_system_suspend_autoresume. I find no other
igt test that require sleeping in relation to suspend-resume, so
it should be removed.
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
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We don't expect to access those registers on Braswell.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105593
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
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get_sink_crc() wants the eDP panel enabled to collect a CRC, but this
is already required for opening the pipe CRC. This was broken in the
conversion to igt_display, because the call to setup_sink_crc was moved.
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105503
Reported-by: Marta Löfstedt <marta.lofstedt@intel.com>
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As we reopen the fd for each subtest, and we need a DRM_MASTER, we need
to drop master on the original before we are allowed to claim DRM_MASTER
on the second.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105922
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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gem_context_create() nowadays assumes you have already checked for
context support and asserts for any error. So check first.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105924
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
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The get_sink_crc function usleep(300000) with motivation:
"Now give a time for human eyes". However, the function has already
exited early on igt_interactive_debug, so no human is waiting.
Also, waiting for keypress is obsolete when not in
igt_interactive_debug mode.
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
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There is currently no hardware in our labs that supports
pipe-d, pipe-e nor pipe-f.
Skipping takes time, so all tests on these pipes should be
blacklisted.
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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Skipping takes time, specifically for the big amount of drrs
related kms_frontbuffer_tracking tests. Since we currently
don't have any system set up with DRRS panels, blacklisting
all those test will save time, and we can avoid the need to
increase the Jenkins timeout in order to solve the Bugzilla
below.
V2: Changed typo and added comment.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105617
Signed-off-by: Marta Lofstedt <marta.lofstedt@intel.com>
Acked-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
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Make sure we gently skip when required features (CCS, getfb2) are not
supported on the running kernel, and clean up properly after ourselves.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Acked-by: Antonio Argenziano <antonio.argenziano@intel.com>
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Reset and unwedge stress testing is supposed to trigger wedging or resets
at incovenient times and then re-use the context so either the context or
driver tracking might get confused and break.
v2:
* Renamed for more sensible naming.
* Added some comments to explain what the test is doing. (Chris Wilson)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Contexts executing when reset triggers are potentialy corrupt so trying to
use them from a subsequent test (like the default context) can hang the
GPU or even the driver.
Workaround that by always creating a dedicated context which will be
running when GPU reset happens.
v2:
* Export and use gem_reopen_device so the test works on old gens as well.
(Chris Wilson)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
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Per Bspec, fb height needs to be min 16 for NV12 (YUV planar
formats). We also need the src height and width to be
multiple of 4.
Reviewed-By: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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We'll want to reuse this, so split it out into a (smaller!) helper.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
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