1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
|
/*
* Copyright © 2018 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
*/
#ifndef GPU_CMDS_H
#define GPU_CMDS_H
#include <intel_bufmgr.h>
#include <i915_drm.h>
#include "media_fill.h"
#include "gen7_media.h"
#include "gen8_media.h"
#include "intel_reg.h"
#include "drmtest.h"
#include "intel_batchbuffer.h"
#include "intel_chipset.h"
#include <assert.h>
void
gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end);
void
gen7_render_context_flush(struct intel_batchbuffer *batch, uint32_t batch_end);
uint32_t
gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
uint8_t color);
uint32_t
gen11_fill_curbe_buffer_data(struct intel_batchbuffer *batch);
uint32_t
gen7_fill_surface_state(struct intel_batchbuffer *batch,
const struct igt_buf *buf,
uint32_t format,
int is_dst);
uint32_t
gen7_fill_binding_table(struct intel_batchbuffer *batch,
const struct igt_buf *dst);
uint32_t
gen11_fill_binding_table(struct intel_batchbuffer *batch,
const struct igt_buf *src,const struct igt_buf *dst);
uint32_t
gen7_fill_kernel(struct intel_batchbuffer *batch,
const uint32_t kernel[][4],
size_t size);
uint32_t
gen7_fill_interface_descriptor(struct intel_batchbuffer *batch,
const struct igt_buf *dst,
const uint32_t kernel[][4],
size_t size);
void
gen7_emit_state_base_address(struct intel_batchbuffer *batch);
void
gen7_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
uint32_t urb_entries, uint32_t urb_size,
uint32_t curbe_size, uint32_t mode);
void
gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer);
void
gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch,
uint32_t interface_descriptor);
void
gen7_emit_media_objects(struct intel_batchbuffer *batch,
unsigned int x, unsigned int y,
unsigned int width, unsigned int height);
void
gen7_emit_gpgpu_walk(struct intel_batchbuffer *batch,
unsigned int x, unsigned int y,
unsigned int width, unsigned int height);
uint32_t
gen8_spin_curbe_buffer_data(struct intel_batchbuffer *batch,
uint32_t iters);
uint32_t
gen8_fill_surface_state(struct intel_batchbuffer *batch,
const struct igt_buf *buf,
uint32_t format,
int is_dst);
uint32_t
gen11_fill_surface_state(struct intel_batchbuffer *batch,
const struct igt_buf *buf,
uint32_t surface_type,
uint32_t format,
uint32_t vertical_alignment,
uint32_t horizontal_alignment,
int is_dst);
uint32_t
gen8_fill_interface_descriptor(struct intel_batchbuffer *batch,
const struct igt_buf *dst,
const uint32_t kernel[][4],
size_t size);
uint32_t
gen11_fill_interface_descriptor(struct intel_batchbuffer *batch,
const struct igt_buf *src,const struct igt_buf *dst,
const uint32_t kernel[][4],
size_t size);
void
gen8_emit_state_base_address(struct intel_batchbuffer *batch);
void
gen8_emit_media_state_flush(struct intel_batchbuffer *batch);
void
gen8_emit_vfe_state(struct intel_batchbuffer *batch, uint32_t threads,
uint32_t urb_entries, uint32_t urb_size,
uint32_t curbe_size);
void
gen8_emit_gpgpu_walk(struct intel_batchbuffer *batch,
unsigned int x, unsigned int y,
unsigned int width, unsigned int height);
void
gen_emit_media_object(struct intel_batchbuffer *batch, unsigned int xoffset,
unsigned int yoffset);
void
gen9_emit_state_base_address(struct intel_batchbuffer *batch);
#endif /* GPU_CMDS_H */
|
