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path: root/drivers/gpu/drm/i915/display/intel_display_power.h
AgeCommit message (Expand)Author
2021-11-19drm/i915: drop intel_display.h include from intel_display_power.hJani Nikula
2021-11-19drm/i915: move structs from intel_display_power.h to .cJani Nikula
2021-11-19drm/i915/debugfs: move debug printing to intel_display_power.cJani Nikula
2021-10-20drm/i915/display: Rename POWER_DOMAIN_DPLL_DC_OFF to POWER_DOMAIN_DC_OFFJosé Roberto de Souza
2021-09-15drm/i915: Introduce with_intel_display_power_if_enabled()Ville Syrjälä
2021-08-02drm/i915/dg1: Adjust the AUDIO power domainAnshuman Gupta
2021-07-30drm/i915/display: remove explicit CNL handling from intel_display_power.cLucas De Marchi
2021-07-22drm/i915/dg2: Add dbuf programmingMatt Roper
2021-07-22drm/i915/dg2: Don't wait for AUX power well enable ACKsMatt Roper
2021-05-12drm/i915/xelpd: Add XE_LPD power wellsMatt Roper
2021-05-07drm/i915/xelpd: add XE_LPD display characteristicsMatt Roper
2021-02-24drm/i915/tgl+: Sanitize the DDI LANES/IO and AUX power domain namesImre Deak
2020-12-03drm/i915: Make intel_display_power_put_unchecked() an internal-only functionImre Deak
2020-12-03drm/i915: Track power reference taken to disable power well functionalityImre Deak
2020-12-03drm/i915: Rename power_domains.wakeref to init_wakerefImre Deak
2020-12-03drm/i915: Factor out helpers to get/put a set of tracked power domainsImre Deak
2020-10-15drm/i915/dg1: Add DG1 power wellsLucas De Marchi
2020-10-15drm/i915/cnl: skip PW_DDI_F on certain skusLucas De Marchi
2020-05-21drm/i915: Introduce for_each_dbuf_slice_in_mask macroStanislav Lisovskiy
2020-05-16drm/i915: Unify the low level dbuf codeVille Syrjälä
2020-04-17drm/i915/tc/tgl: Implement TC cold sequencesJosé Roberto de Souza
2020-04-17drm/i915: Add i915_lpsp_status debugfs attributeAnshuman Gupta
2020-04-17drm/i915: Power well id for ICL PG3Anshuman Gupta
2020-02-26drm/i915/tgl: Allow DC5/DC6 entry while PG2 is activeMatt Roper
2020-02-05drm/i915: Introduce parameterized DBUF_CTLStanislav Lisovskiy
2019-12-23drm/i915: fix comment for POWER_DOMAIN_TRANSCODER_VDSC_PW2Jani Nikula
2019-10-08drm/i915/tgl: Switch between dc3co and dc5 based on display idlenessAnshuman Gupta
2019-10-08drm/i915/tgl: Enable DC3CO state in "DC Off" power wellAnshuman Gupta
2019-08-28drm/i915: Align power domain names with port namesImre Deak
2019-08-16drm/i915: Move i915_power_well_id out of i915_reg.hDaniele Ceraolo Spurio
2019-08-07drm/i915: abstract display suspend/resume operationsRodrigo Vivi
2019-07-12drm/i915: Propagate "_remove" function name suffix downJanusz Krzysztofik
2019-07-11drm/i915/tgl: Add power well to support 4th pipeMika Kahola
2019-07-11drm/i915/tgl: Add power well supportImre Deak
2019-07-11drm/i915/tgl: rename TRANSCODER_EDP_VDSC to use on transcoder AJosé Roberto de Souza
2019-07-05drm/i915/ehl: Add support for DPLL4 (v10)Vivek Kasireddy
2019-06-17drm/i915: move modesetting core code under display/Jani Nikula
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