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authorBruno Randolf <br1@einfach.org>2010-06-28 11:01:48 +0900
committerJohn W. Linville <linville@tuxdriver.com>2010-06-28 15:16:19 -0400
commit6665b54e79d52c813914481783d82398ca2451f6 (patch)
tree0e112f93491bcb11f3d0574e6629c469f6f51083
parent55d02a47deaa5c4616e9e70e227ea833e263b858 (diff)
ath5k: fix antenna div gc for <= AR5K_SREV_PHY_2413
In commit 39d5b2c83ca8904b6826a0713263a4e5a9c0730a "ath5k: update AR5K_PHY_RESTART_DIV_GC values to match masks" i introduced a regression on PHY chips older than AR5K_SREV_PHY_5413, which caused signal values to be about 10dB less that before. This patch reverts the AR5K_PHY_RESTART_DIV_GC values to the same values which were effectively used before (without the bitmask mistake). This brings signal levels back to normal on these PHY chips. Signed-off-by: Bruno Randolf <br1@einfach.org> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/net/wireless/ath/ath5k/phy.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/wireless/ath/ath5k/phy.c b/drivers/net/wireless/ath/ath5k/phy.c
index 73c4fcd142b..6284c389ba1 100644
--- a/drivers/net/wireless/ath/ath5k/phy.c
+++ b/drivers/net/wireless/ath/ath5k/phy.c
@@ -1768,7 +1768,7 @@ ath5k_hw_set_fast_div(struct ath5k_hw *ah, u8 ee_mode, bool enable)
if (enable) {
AR5K_REG_WRITE_BITS(ah, AR5K_PHY_RESTART,
- AR5K_PHY_RESTART_DIV_GC, 1);
+ AR5K_PHY_RESTART_DIV_GC, 4);
AR5K_REG_ENABLE_BITS(ah, AR5K_PHY_FAST_ANT_DIV,
AR5K_PHY_FAST_ANT_DIV_EN);