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| author | John Stultz <john.stultz@linaro.org> | 2011-07-25 09:58:06 -0700 |
|---|---|---|
| committer | John Stultz <john.stultz@linaro.org> | 2011-07-25 09:58:06 -0700 |
| commit | 21a602b5cdc203cbcf8bbeeb26edeb3de7c65955 (patch) | |
| tree | 8618b4a8882f78076a779ebb416b54332cc213db /arch/arm/include/asm/cputype.h | |
| parent | 1a3807e5a6bea7e4b195fbb399bbc09e73230d4c (diff) | |
| parent | 81f6236c4811b2b2b3ea64a306c071f76788ac4b (diff) | |
Merge branch 'upstream/linaro-3.0' into linaro-android-3.0linux-linaro-3.0-2011.07-1-android-0
Diffstat (limited to 'arch/arm/include/asm/cputype.h')
| -rw-r--r-- | arch/arm/include/asm/cputype.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/cputype.h b/arch/arm/include/asm/cputype.h index cd4458f6417..cb47d28cbe1 100644 --- a/arch/arm/include/asm/cputype.h +++ b/arch/arm/include/asm/cputype.h @@ -8,6 +8,7 @@ #define CPUID_CACHETYPE 1 #define CPUID_TCM 2 #define CPUID_TLBTYPE 3 +#define CPUID_MPIDR 5 #define CPUID_EXT_PFR0 "c1, 0" #define CPUID_EXT_PFR1 "c1, 1" @@ -70,6 +71,11 @@ static inline unsigned int __attribute_const__ read_cpuid_tcmstatus(void) return read_cpuid(CPUID_TCM); } +static inline unsigned int __attribute_const__ read_cpuid_mpidr(void) +{ + return read_cpuid(CPUID_MPIDR); +} + /* * Intel's XScale3 core supports some v6 features (supersections, L2) * but advertises itself as v5 as it does not support the v6 ISA. For |