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authorAndy Green <andy@warmcat.com>2011-03-03 13:50:37 +0000
committerNicolas Pitre <nicolas.pitre@linaro.org>2011-03-03 14:40:35 -0500
commit164085ed34dae1a5bd8b561fc8791a663a95005d (patch)
treeacc44713a7bf6b42dfd85276ac105b4d82914121 /drivers/i2c/busses/i2c-omap.c
parent6359036d179623bfa01410cc783548b6774c2b3a (diff)
OMAP3 and 4 i2c mark extended reg enums as extended only
The OMAP I2C driver dynamically chooses between two register sets of differing sizes depending on the cpu type it finds itself on. It has been observed that the existing code references non-existing registers on OMAP3530, because while it correctly chose the smaller register layout based on cpu type, the code uses the probed register ID to decide if to execute code referencing an extra register, and both register layout devices on OMAP3530 and OMAP4430 report the same probed ID of 0x40. This patch changes the extended register name to make it clearer they only exist in OMAP4 context Cc: patches@linaro.org Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andy Green <andy.green@linaro.org> Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Diffstat (limited to 'drivers/i2c/busses/i2c-omap.c')
-rw-r--r--drivers/i2c/busses/i2c-omap.c23
1 files changed, 12 insertions, 11 deletions
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index f17e1c52d0e..843fccc703d 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -72,11 +72,12 @@ enum {
OMAP_I2C_SCLH_REG,
OMAP_I2C_SYSTEST_REG,
OMAP_I2C_BUFSTAT_REG,
- OMAP_I2C_REVNB_LO,
- OMAP_I2C_REVNB_HI,
- OMAP_I2C_IRQSTATUS_RAW,
- OMAP_I2C_IRQENABLE_SET,
- OMAP_I2C_IRQENABLE_CLR,
+ /* only on OMAP4430 */
+ OMAP_I2C_OMAP4430_REVNB_LO,
+ OMAP_I2C_OMAP4430_REVNB_HI,
+ OMAP_I2C_OMAP4430_IRQSTATUS_RAW,
+ OMAP_I2C_OMAP4430_IRQENABLE_SET,
+ OMAP_I2C_OMAP4430_IRQENABLE_CLR,
};
/* I2C Interrupt Enable Register (OMAP_I2C_IE): */
@@ -244,11 +245,11 @@ const static u8 omap4_reg_map[] = {
[OMAP_I2C_SCLH_REG] = 0xb8,
[OMAP_I2C_SYSTEST_REG] = 0xbC,
[OMAP_I2C_BUFSTAT_REG] = 0xc0,
- [OMAP_I2C_REVNB_LO] = 0x00,
- [OMAP_I2C_REVNB_HI] = 0x04,
- [OMAP_I2C_IRQSTATUS_RAW] = 0x24,
- [OMAP_I2C_IRQENABLE_SET] = 0x2c,
- [OMAP_I2C_IRQENABLE_CLR] = 0x30,
+ [OMAP_I2C_OMAP4430_REVNB_LO] = 0x00,
+ [OMAP_I2C_OMAP4430_REVNB_HI] = 0x04,
+ [OMAP_I2C_OMAP4430_IRQSTATUS_RAW] = 0x24,
+ [OMAP_I2C_OMAP4430_IRQENABLE_SET] = 0x2c,
+ [OMAP_I2C_OMAP4430_IRQENABLE_CLR] = 0x30,
};
static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev,
@@ -309,7 +310,7 @@ static void omap_i2c_idle(struct omap_i2c_dev *dev)
dev->iestate = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG);
if (dev->rev >= OMAP_I2C_REV_ON_4430)
- omap_i2c_write_reg(dev, OMAP_I2C_IRQENABLE_CLR, 1);
+ omap_i2c_write_reg(dev, OMAP_I2C_OMAP4430_IRQENABLE_CLR, 1);
else
omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, 0);