diff options
Diffstat (limited to 'include/linux/mfd/db5500-prcmu.h')
-rw-r--r-- | include/linux/mfd/db5500-prcmu.h | 149 |
1 files changed, 147 insertions, 2 deletions
diff --git a/include/linux/mfd/db5500-prcmu.h b/include/linux/mfd/db5500-prcmu.h index 9890687f582..681c8f99bf1 100644 --- a/include/linux/mfd/db5500-prcmu.h +++ b/include/linux/mfd/db5500-prcmu.h @@ -24,12 +24,53 @@ void db5500_prcmu_get_abb_event_buffer(void __iomem **buf); int prcmu_resetout(u8 resoutn, u8 state); int db5500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, bool keep_ap_pll); +u8 db5500_prcmu_get_power_state_result(void); int db5500_prcmu_config_esram0_deep_sleep(u8 state); void db5500_prcmu_system_reset(u16 reset_code); u16 db5500_prcmu_get_reset_code(void); -bool db5500_prcmu_is_ac_wake_requested(void); +#ifdef CONFIG_UX500_SOC_DB5500 +void prcmu_modem_req(void); +void prcmu_modem_rel(void); +void prcmu_ape_ack(void); +#endif +bool db5500_prcmu_is_modem_requested(void); +void db5500_prcmu_modem_reset(void); int db5500_prcmu_set_arm_opp(u8 opp); int db5500_prcmu_get_arm_opp(void); +int db5500_prcmu_set_ape_opp(u8 opp); +int db5500_prcmu_get_ape_opp(void); +int db5500_prcmu_set_ddr_opp(u8 opp); +int db5500_prcmu_get_ddr_opp(void); + +u32 db5500_prcmu_read(unsigned int reg); +void db5500_prcmu_write(unsigned int reg, u32 value); +void db5500_prcmu_write_masked(unsigned int reg, u32 mask, u32 value); + +static inline unsigned long prcmu_clock_rate(u8 clock) +{ + return 0; +} + +static inline long prcmu_round_clock_rate(u8 clock, unsigned long rate) +{ + return 0; +} + +static inline int prcmu_set_clock_rate(u8 clock, unsigned long rate) +{ + return 0; +} +int db5500_prcmu_get_hotdog(void); +int db5500_prcmu_config_hotdog(u8 threshold); +int db5500_prcmu_config_hotmon(u8 low, u8 high); +int db5500_prcmu_start_temp_sense(u16 cycles32k); +int db5500_prcmu_stop_temp_sense(void); + +int db5500_prcmu_config_a9wdog(u8 num, bool sleep_auto_off); +int db5500_prcmu_enable_a9wdog(u8 id); +int db5500_prcmu_disable_a9wdog(u8 id); +int db5500_prcmu_kick_a9wdog(u8 id); +int db5500_prcmu_load_a9wdog(u8 id, u32 timeout); #else /* !CONFIG_UX500_SOC_DB5500 */ @@ -50,6 +91,11 @@ static inline int db5500_prcmu_request_clock(u8 clock, bool enable) return 0; } +static inline unsigned long db5500_prcmu_clock_rate(u8 clock) +{ + return 0; +} + static inline int db5500_prcmu_set_display_clocks(void) { return 0; @@ -72,6 +118,16 @@ static inline int db5500_prcmu_config_esram0_deep_sleep(u8 state) static inline void db5500_prcmu_enable_wakeups(u32 wakeups) {} +static inline long db5500_prcmu_round_clock_rate(u8 clock, unsigned long rate) +{ + return 0; +} + +static inline int db5500_prcmu_set_clock_rate(u8 clock, unsigned long rate) +{ + return 0; +} + static inline int prcmu_resetout(u8 resoutn, u8 state) { return 0; @@ -91,6 +147,11 @@ static inline int db5500_prcmu_set_power_state(u8 state, bool keep_ulp_clk, return 0; } +static inline u8 db5500_prcmu_get_power_state_result(void) +{ + return 0; +} + static inline void db5500_prcmu_system_reset(u16 reset_code) {} static inline u16 db5500_prcmu_get_reset_code(void) @@ -98,11 +159,18 @@ static inline u16 db5500_prcmu_get_reset_code(void) return 0; } -static inline bool db5500_prcmu_is_ac_wake_requested(void) +static inline void db5500_prcmu_modem_reset(void) {} +static inline bool db5500_prcmu_is_modem_requested(void) { return 0; } +#ifdef CONFIG_UX500_SOC_DB5500 +static void prcmu_ape_ack(void) {} +static void prcmu_modem_req(void) {} +static void prcmu_modem_rel(void) {} +#endif + static inline int db5500_prcmu_set_arm_opp(u8 opp) { return 0; @@ -113,6 +181,83 @@ static inline int db5500_prcmu_get_arm_opp(void) return 0; } +static inline int db5500_prcmu_set_ape_opp(u8 opp) +{ + return 0; +} + +static inline int db5500_prcmu_get_ape_opp(void) +{ + return 0; +} + +static inline int db5500_prcmu_set_ddr_opp(u8 opp) +{ + return 0; +} + +static inline int db5500_prcmu_get_ddr_opp(void) +{ + return 0; +} + +static inline u32 db5500_prcmu_read(unsigned int reg) +{ + return 0; +} + +static inline void db5500_prcmu_write(unsigned int reg, u32 value) {} + +static inline void db5500_prcmu_write_masked(unsigned int reg, u32 mask, + u32 value) {} + +static inline int db5500_prcmu_get_hotdog(void) +{ + return -ENOSYS; +} +static inline int db5500_prcmu_config_hotdog(u8 threshold) +{ + return 0; +} + +static inline int db5500_prcmu_config_hotmon(u8 low, u8 high) +{ + return 0; +} + +static inline int db5500_prcmu_start_temp_sense(u16 cycles32k) +{ + return 0; +} +static inline int db5500_prcmu_stop_temp_sense(void) +{ + return 0; +} + +static inline int db5500_prcmu_config_a9wdog(u8 num, bool sleep_auto_off) +{ + return 0; +} + +static inline int db5500_prcmu_enable_a9wdog(u8 id) +{ + return 0; +} + +static inline int db5500_prcmu_disable_a9wdog(u8 id) +{ + return 0; +} + +static inline int db5500_prcmu_kick_a9wdog(u8 id) +{ + return 0; +} + +static inline int db5500_prcmu_load_a9wdog(u8 id, u32 timeout) +{ + return 0; +} #endif /* CONFIG_MFD_DB5500_PRCMU */ |