diff options
| author | Stefan Nilsson XK <stefan.xk.nilsson@stericsson.com> | 2011-03-20 12:00:22 +0100 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@stericsson.com> | 2011-09-19 15:15:00 +0200 |
| commit | d7807318a4ae76dd0b979e02de477b215b2ba4e5 (patch) | |
| tree | 84f47e94c9ac2427d8101e39c04bc413f75cd8a3 /arch/arm/mach-ux500/board-mop500-pins.c | |
| parent | f890cdd6930624fb2ff8041128c80ae5fe406dd7 (diff) | |
mach-ux500: Control WLAN pins correctly
WLAN has two pins that must not be reconfigured during suspend.
The first one is WLAN_ENABLE which keeps the WLAN chip running.
The second one is WLAN_IRQ which is supposed to wake up the platform
when there is incoming traffic from WLAN.
ST-Ericsson ID: ER329495
ST-Ericsson FOSS-OUT ID: Trivial
Change-Id: I3de6d0540940b90074f27f8c3fbdfb9823149e5e
Signed-off-by: Stefan Nilsson XK <stefan.xk.nilsson@stericsson.com>
Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/18691
Reviewed-by: Henrik CARLING <henrik.carling@stericsson.com>
Diffstat (limited to 'arch/arm/mach-ux500/board-mop500-pins.c')
| -rw-r--r-- | arch/arm/mach-ux500/board-mop500-pins.c | 50 |
1 files changed, 36 insertions, 14 deletions
diff --git a/arch/arm/mach-ux500/board-mop500-pins.c b/arch/arm/mach-ux500/board-mop500-pins.c index a65a1e0e32a..d804f516bd9 100644 --- a/arch/arm/mach-ux500/board-mop500-pins.c +++ b/arch/arm/mach-ux500/board-mop500-pins.c @@ -356,6 +356,7 @@ void mop500_pins_suspend_force(void) u32 bankaddr; u32 w_imsc; u32 imsc; + u32 mask; /* * Apply HSI GPIO Config for DeepSleep @@ -370,11 +371,17 @@ void mop500_pins_suspend_force(void) imsc = readl(bankaddr + NMK_GPIO_RIMSC) | readl(bankaddr + NMK_GPIO_FIMSC); - writel(0x409C702A & ~w_imsc, bankaddr + NMK_GPIO_DIR); - writel(0x001C002A & ~w_imsc, bankaddr + NMK_GPIO_DATS); - writel(0x807000 & ~w_imsc, bankaddr + NMK_GPIO_DATC); - writel(0x5FFFFFFF & ~w_imsc & ~imsc, bankaddr + NMK_GPIO_PDIS); - writel(0 , bankaddr + NMK_GPIO_SLPC); + mask = 0; + if (machine_is_hrefv60()) + /* Mask away pin 4 (0x10) which is WLAN_IRQ */ + mask |= 0x10; + + writel(0x409C702A & ~w_imsc & ~mask, bankaddr + NMK_GPIO_DIR); + writel(0x001C002A & ~w_imsc & ~mask, bankaddr + NMK_GPIO_DATS); + writel(0x807000 & ~w_imsc & ~mask, bankaddr + NMK_GPIO_DATC); + writel(0x5FFFFFFF & ~w_imsc & ~imsc & ~mask, bankaddr + NMK_GPIO_PDIS); + writel(readl(bankaddr + NMK_GPIO_SLPC) & mask, + bankaddr + NMK_GPIO_SLPC); /* Bank1 */ bankaddr = IO_ADDRESS(U8500_GPIOBANK1_BASE); @@ -401,10 +408,15 @@ void mop500_pins_suspend_force(void) imsc = readl(bankaddr + NMK_GPIO_RIMSC) | readl(bankaddr + NMK_GPIO_FIMSC); - writel(0x3D7C0 & ~w_imsc, bankaddr + NMK_GPIO_DIRS); - writel(0x803C2830, bankaddr + NMK_GPIO_DIRC); - writel(0x3D7C0 & ~w_imsc , bankaddr + NMK_GPIO_DATC); - writel(0xFFFFFFFF & ~w_imsc & ~imsc, bankaddr + NMK_GPIO_PDIS); + mask = 0; + if (machine_is_hrefv60()) + /* Mask away pin 85 (0x200000) which is WLAN_ENABLE */ + mask |= 0x200000; + + writel(0x3D7C0 & ~w_imsc & ~mask, bankaddr + NMK_GPIO_DIRS); + writel(0x803C2830 & ~mask, bankaddr + NMK_GPIO_DIRC); + writel(0x3D7C0 & ~w_imsc & ~mask, bankaddr + NMK_GPIO_DATC); + writel(0xFFFFFFFF & ~w_imsc & ~imsc & ~mask, bankaddr + NMK_GPIO_PDIS); writel(0 , bankaddr + NMK_GPIO_SLPC); /* Bank3 */ @@ -461,11 +473,21 @@ void mop500_pins_suspend_force(void) imsc = readl(bankaddr + NMK_GPIO_RIMSC) | readl(bankaddr + NMK_GPIO_FIMSC); - writel(0x8810810 & ~w_imsc, bankaddr + NMK_GPIO_DIRS); - writel(0xF57EF7EF, bankaddr + NMK_GPIO_DIRC); - writel(0x8810810 & ~w_imsc, bankaddr + NMK_GPIO_DATC); - writel(0xFFFFFFFF & ~w_imsc & ~imsc, bankaddr + NMK_GPIO_PDIS); - writel(0 , bankaddr + NMK_GPIO_SLPC); + mask = 0; + if (!machine_is_hrefv60()) { + /* Mask away pin 215 (0x800000) which is WLAN_ENABLE */ + mask |= 0x800000; + + /* Mask away pin 216 (0x1000000) which is WLAN_IRQ */ + mask |= 0x1000000; + } + + writel(0x8810810 & ~w_imsc & ~mask, bankaddr + NMK_GPIO_DIRS); + writel(0xF57EF7EF & ~mask, bankaddr + NMK_GPIO_DIRC); + writel(0x8810810 & ~w_imsc & ~mask, bankaddr + NMK_GPIO_DATC); + writel(0xFFFFFFFF & ~w_imsc & ~imsc & ~mask, bankaddr + NMK_GPIO_PDIS); + writel(readl(bankaddr + NMK_GPIO_SLPC) & mask, + bankaddr + NMK_GPIO_SLPC); /* Bank7 */ |