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authorMarkus Klotzbuecher <mk@denx.de>2006-03-24 14:35:25 +0100
committerMarkus Klotzbücher <mk@pollux.denx.de>2006-03-24 14:35:25 +0100
commit40b0bafbb282a8fd2d705be0623948ff551bf26a (patch)
treee23f1097ef1528e866ac988f6677e8008c539cb0
parentba70d6a4170ebbec5513f01ceae66a200102ba9a (diff)
Added config options CFG_MONAHANS_RUN_MODE_OSC_RATIO and
CFG_MONAHANS_TURBO_RUN_MODE_RATIO for configuring the Monahans core frequency.
-rw-r--r--cpu/pxa/start.S17
-rw-r--r--include/configs/delta.h8
2 files changed, 22 insertions, 3 deletions
diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S
index 9541c9b2b..ffaa30fdc 100644
--- a/cpu/pxa/start.S
+++ b/cpu/pxa/start.S
@@ -190,6 +190,14 @@ OSTIMER_BASE: .word 0x40a00000
#define OIER 0x1C
/* Clock Manager Registers */
+#ifdef CONFIG_CPU_MONAHANS
+# ifndef CFG_MONAHANS_RUN_MODE_OSC_RATIO
+# error "You have to define CFG_MONAHANS_RUN_MODE_OSC_RATIO!!"
+# endif
+# ifndef CFG_MONAHANS_TURBO_RUN_MODE_RATIO
+# define CFG_MONAHANS_TURBO_RUN_MODE_RATIO 0x1
+# endif
+#else /* ! CONFIG_CPU_MONAHANS */
#ifdef CFG_CPUSPEED
CC_BASE: .word 0x41300000
#define CCCR 0x00
@@ -197,6 +205,7 @@ cpuspeed: .word CFG_CPUSPEED
#else
#error "You have to define CFG_CPUSPEED!!"
#endif
+#endif /* CONFIG_CPU_MONAHANS */
/* takes care the CP15 update has taken place */
.macro CPWAIT reg
@@ -233,9 +242,13 @@ cpu_init_crit:
str r2, [r1]
#endif
-#ifndef CONFIG_CPU_MONAHANS
+ /* set clock speed */
+#ifdef CONFIG_CPU_MONAHANS
+ ldr r0, =ACCR
+ ldr r1, =(((CFG_MONAHANS_TURBO_RUN_MODE_RATIO<<8) & ACCR_XN_MASK) | (CFG_MONAHANS_RUN_MODE_OSC_RATIO & ACCR_XL_MASK))
+ str r1, [r0]
+#else /* ! CONFIG_CPU_MONAHANS */
#ifdef CFG_CPUSPEED
- /* set clock speed tbd@mk: required for monahans? */
ldr r0, CC_BASE
ldr r1, cpuspeed
str r1, [r0, #CCCR]
diff --git a/include/configs/delta.h b/include/configs/delta.h
index eaa4c432b..776ee15d1 100644
--- a/include/configs/delta.h
+++ b/include/configs/delta.h
@@ -132,7 +132,13 @@
#define CFG_LOAD_ADDR (CFG_DRAM_BASE + 0x8000) /* default load address */
#define CFG_HZ 3250000 /* incrementer freq: 3.25 MHz */
-#define CFG_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */
+
+/* Monahans Core Frequency =
+ *
+ */
+#define CFG_MONAHANS_RUN_MODE_OSC_RATIO 16 /* valid values: 8, 16, 24, 31 */
+#define CFG_MONAHANS_TURBO_RUN_MODE_RATIO 1 /* valid values: 1, 2 */
+
/* valid baudrates */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }