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authorRabin Vincent <rabin.vincent@stericsson.com>2010-04-28 13:09:22 +0530
committerJonas ABERG <jonas.aberg@stericsson.com>2010-05-24 08:01:12 +0200
commit9c2ca2d1d367d6fe616d0b2f2fb4abac04d9069e (patch)
tree82b62199e194324b9a6afac804722b73de15f071 /board/st/u8500/u8500.c
parent07967a694db6f9652453c302537d574ec10c63dc (diff)
HREF+ SD support
On HREF+, SD card power supply is controlled by the Vaux3 regulator. In order to enable the power supply, port the AB8500 PRCMU I2C read/write code from Linux to U-Boot, and then write the appropriate registers via those functions. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Change-Id: I470f3da694e6ea0e3e0e16571c3048066f0a4309 Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/388 Reviewed-by: Michael BRANDT <michael.brandt@stericsson.com> Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com> Tested-by: Jonas ABERG <jonas.aberg@stericsson.com>
Diffstat (limited to 'board/st/u8500/u8500.c')
-rw-r--r--board/st/u8500/u8500.c72
1 files changed, 70 insertions, 2 deletions
diff --git a/board/st/u8500/u8500.c b/board/st/u8500/u8500.c
index cf6b70bdc..02df1ed53 100644
--- a/board/st/u8500/u8500.c
+++ b/board/st/u8500/u8500.c
@@ -13,6 +13,7 @@
#include <asm/errno.h>
#include <asm/arch/clock.h>
#include <asm/arch/hardware.h>
+#include <asm/arch/ab8500.h>
#include "gpio.h"
#include "common.h"
@@ -126,13 +127,22 @@ void show_boot_progress(int progress)
}
#endif
-int u8500_is_earlydrop(void)
+static unsigned int read_asicid(void)
{
unsigned int *address = (void *)U8500_BOOTROM_BASE
+ U8500_BOOTROM_ASIC_ID_OFFSET;
+ return readl(address);
+}
+int u8500_is_earlydrop(void)
+{
/* 0x01 for ED, 0xA0 for v1 */
- return (readl(address) & 0xff) == 0x01;
+ return (read_asicid() & 0xff) == 0x01;
+}
+
+int cpu_is_u8500v11(void)
+{
+ return read_asicid() == 0x008500A1;
}
/*
@@ -190,6 +200,62 @@ unsigned int addr_vall_arr[] = {
};
#ifdef BOARD_LATE_INIT
+#ifdef CONFIG_MMC
+
+#define LDO_VAUX3_MASK 0x3
+#define LDO_VAUX3_ENABLE 0x1
+#define VAUX3_VOLTAGE_2_9V 0xd
+
+static int hrefplus_mmc_power_init(void)
+{
+ int ret;
+ int val;
+
+ if (!cpu_is_u8500v11())
+ return 0;
+
+ /*
+ * On v1.1 HREF boards (HREF+), Vaux3 needs to be enabled for the SD
+ * card to work. This is done by enabling the regulators in the AB8500
+ * via PRCMU I2C transactions.
+ *
+ * This code is derived from the handling of AB8500_LDO_VAUX3 in
+ * ab8500_ldo_enable() and ab8500_ldo_disable() in Linux.
+ *
+ * Turn off and delay is required to have it work across soft reboots.
+ */
+
+ ret = ab8500_read(AB8500_REGU_CTRL2, AB8500_REGU_VRF1VAUX3_REGU_REG);
+ if (ret < 0)
+ goto out;
+
+ val = ret;
+
+ /* Turn off */
+ ret = ab8500_write(AB8500_REGU_CTRL2, AB8500_REGU_VRF1VAUX3_REGU_REG,
+ val & ~LDO_VAUX3_MASK);
+ if (ret < 0)
+ goto out;
+
+ udelay(10 * 1000);
+
+ /* Set the voltage to 2.9V */
+ ret = ab8500_write(AB8500_REGU_CTRL2,
+ AB8500_REGU_VRF1VAUX3_SEL_REG, VAUX3_VOLTAGE_2_9V);
+ if (ret < 0)
+ goto out;
+
+ val = val & ~LDO_VAUX3_MASK;
+ val = val | LDO_VAUX3_ENABLE;
+
+ /* Turn on the supply */
+ ret = ab8500_write(AB8500_REGU_CTRL2,
+ AB8500_REGU_VRF1VAUX3_REGU_REG, val);
+
+out:
+ return ret;
+}
+#endif
/*
* called after all initialisation were done, but before the generic
* mmc_initialize().
@@ -219,6 +285,8 @@ int board_late_init(void)
setenv("board_id", "1");
}
#ifdef CONFIG_MMC
+ hrefplus_mmc_power_init();
+
/*
* config extended GPIO pins for level shifter and
* SDMMC_ENABLE