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authorMichael Brandt <michael.brandt@stericsson.com>2010-02-19 10:15:10 +0100
committerJonas ABERG <jonas.aberg@stericsson.com>2010-05-19 09:52:26 +0200
commitf4f7f7d70bc982d6689f09bf97e62caec223629f (patch)
tree35e858603bc26edc2ae6c9774486367acaa4a6f9 /board/st/u8500/u8500_i2c.c
parent1e4db0172510318ddc94ef7fcc071fdd435c2e47 (diff)
HREF V1 updates
This patch is part of WP254081 which depends on WP252006. * Fixed I2C, use real timeouts instead of counter * Undefined CONFIG_BOOTTIME, since it as to be changed to new timer.c * Merged V1 patches from Bangalore The patches were merged manually, because of the differences of the U-Boot baseline (Bangalore U-Boot 1.3.1, Lund 2009.11). The original patches were created by Rabin Vincent <rabin.vincent@stericsson.com>. and were applied originally to Branches: blr_lsp, remotes/origin/blr_lsp Follows: qpppaaa_20100210_094651 0001-u8500-gpio-add-I2C0-altfun.patch 0002-u8500-use-correct-v1-macros.patch 0003-emmc-clean-up-paritioning.patch 0004-u8500-remove-incorrect-ram-settings.patch 0005-u8500-gpio-remove-unnecessary-ifdefs.patch 0006-u8500-add-ED-v1-detection-and-handle-eMMC-diff.patch 0008-u8500-mmc-don-t-disable-altfuns.patch 0009-u8500-gpio-remove-unused-defined.patch 0010-u8500-mmc-add-barrier-for-while-loop.patch 0011-u8500-mmc-handle-non-block-addressed-cards.patch 0012-u8500-mmc-remove-unused-gpio-settings-on-v1.patch 0013-u8500-emmc-build-fix.patch 0014-u8500-handle-v1-gpios-and-clocks.patch 0015-mmc-build-fix-for-block-addressing.patch 0016-u8500-add-clocks-and-hardware-files.patch 0017-u8500-enable-PRCUM-timers-reg-for-ED.patch 0018-u8500-handle-MTU-for-v1-ED.patch 0019-u8500-emmc-remove-unnecessary-GPIO-settings.patch 0020-u8500-remove-dead-code.patch 0021-u8500-add-working-MTU-timer.patch 0022-pl011-empty-rx-fifo-if-necessary.patch 0023-u8500-gpio-fix-cont-handling-in-altfunc.patch 0024-u8500-reduce-bootdelay-to-1-and-enable-zero-check.patch 0025-u8500-disable-forcing-of-verify-but-set-n-by-default.patch 0029-u8500-fix-some-gpio-settings.patch 0030-emmc-make-v1-paritioning-differences-explicit.patch Signed-off-by: Michael Brandt <Michael.Brandt@stericsson.com> Change-Id: I1106702e393c34f630e71f071e06c3952b0d3a1a Reviewed-on: http://gerrit.lud.stericsson.com/gerrit/182 Reviewed-by: Michael BRANDT <michael.brandt@stericsson.com> Tested-by: Jonas ABERG <jonas.aberg@stericsson.com> Reviewed-by: Jonas ABERG <jonas.aberg@stericsson.com>
Diffstat (limited to 'board/st/u8500/u8500_i2c.c')
-rw-r--r--board/st/u8500/u8500_i2c.c70
1 files changed, 26 insertions, 44 deletions
diff --git a/board/st/u8500/u8500_i2c.c b/board/st/u8500/u8500_i2c.c
index fe1b7ae56..e41f7ef51 100644
--- a/board/st/u8500/u8500_i2c.c
+++ b/board/st/u8500/u8500_i2c.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) ST-Ericsson AB 2009
+ * Copyright (C) ST-Ericsson AB 2010
*
* Basic U-Boot I2C interface for STn8500/DB8500
* Author: Michael Brandt <Michael.Brandt@stericsson.com>
@@ -8,11 +8,7 @@
*/
/*
- * Only 7-bit I2C device address are supported.
- *
- * TODO:
- * - eliminate "timeout" loop counters and replace with real
- * timeouts based on timer ticks.
+ * Only 7-bit I2C device addresses are supported.
*/
#include <common.h>
@@ -33,8 +29,8 @@ typedef enum {
I2C_OVFL
} i2c_error_t;
-#define I2C_ENDAD_COUNTER 500000 /* I2C bus "timeout" */
-#define I2C_FIFO_FLUSH_COUNTER 50000 /* flush "timeout" */
+#define I2C_ENDAD_COUNTER (CONFIG_SYS_HZ/100) /* I2C bus timeout */
+#define I2C_FIFO_FLUSH_COUNTER 500000 /* flush "timeout" */
#define I2C_SCL_FREQ 100000 /* I2C bus clock frequency.*/
#define I2C_INPUT_FREQ 48000000 /* Input clock frequency.*/
#define TX_FIFO_THRESHOLD 0x4
@@ -162,37 +158,38 @@ void i2c_init(int speed, int slaveaddr)
* loop_till_bit_clear - polls on a bit till it clears
* ioreg: register where you want to check status
* mask: bit mask for the bit you wish to check
- * end_counter: upper limit to the counter when you stop checking
+ * timeout: timeout in ticks/s
*/
-static int loop_till_bit_clear(void *io_reg, u32 mask, int end_counter)
+static int loop_till_bit_clear(void *io_reg, u32 mask, unsigned long timeout)
{
- int loop = 0;
- while (1) {
+ unsigned long timebase = get_timer(0);
+
+ do {
if ((readl(io_reg) & mask) == 0x0UL)
return 0;
- loop++;
- if (loop == end_counter)
- return 1;
- }
+ } while (get_timer(timebase) < timeout);
+
+ debug("loop_till_bit_clear timed out\n");
+ return -1;
}
/*
* loop_till_bit_set - polls on a bit till it is set.
* ioreg: register where you want to check status
* mask: bit mask for the bit you wish to check
- * end_counter: upper limit to the counter when you stop checking
- *
+ * timeout: timeout in ticks/s
*/
-static int loop_till_bit_set(void * io_reg, u32 mask, int end_counter)
+static int loop_till_bit_set(void * io_reg, u32 mask, unsigned long timeout)
{
- int loop = 0;
- while (1) {
+ unsigned long timebase = get_timer(0);
+
+ do {
if ((readl(io_reg) & mask) != 0x0UL)
return 0;
- loop++;
- if (loop == end_counter)
- return 1;
- }
+ } while (get_timer(timebase) < timeout);
+
+ debug("loop_till_bit_set timed out\n");
+ return -1;
}
/*
@@ -260,7 +257,7 @@ static void i2c_abort(t_i2c_registers *p_i2c_registers)
#ifdef DEBUG
print_abort_reason(p_i2c_registers);
#endif
- /* flush fifo */
+ /* flush RX and TX fifos */
flush_fifo(p_i2c_registers);
/* Acknowledge the Master Transaction Done */
@@ -269,14 +266,7 @@ static void i2c_abort(t_i2c_registers *p_i2c_registers)
/* Acknowledge the Master Transaction Done Without Stop */
I2C_SET_BIT(p_i2c_registers->icr, I2C_INT_MTDWS);
- /* disable controller */
- I2C_CLR_BIT(p_i2c_registers->cr, I2C_CR_PE);
-
- /* delay 10 milliseconds */
- udelay(10*1000);
-
- /* enable controller */
- I2C_SET_BIT(p_i2c_registers->cr, I2C_CR_PE);
+ i2c_init(i2c_bus_speed[i2c_bus_num], CONFIG_SYS_I2C_SLAVE);
}
/*
@@ -587,7 +577,6 @@ int i2c_set_bus_num(unsigned int bus)
int i2c_set_bus_speed(unsigned int speed)
{
- t_i2c_registers *p_i2c_registers;
if (speed > I2C_MAX_STANDARD_SCL) {
debug("i2c_set_bus_speed: only up to %d supported\n",
@@ -595,15 +584,8 @@ int i2c_set_bus_speed(unsigned int speed)
return -1;
}
- p_i2c_registers = i2c_dev[i2c_bus_num];
-
- /* Disable the controller */
- I2C_CLR_BIT(p_i2c_registers->cr, I2C_CR_PE);
-
- i2c_bus_speed[i2c_bus_num] = __i2c_set_bus_speed(speed);
-
- /* Enable the controller */
- I2C_SET_BIT(p_i2c_registers->cr, I2C_CR_PE);
+ /* sets as side effect i2c_bus_speed[i2c_bus_num] */
+ i2c_init(speed, CONFIG_SYS_I2C_SLAVE);
return 0;
}