diff options
| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2008-10-16 15:01:15 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-10-18 21:54:03 +0200 |
| commit | 6d0f6bcf337c5261c08fabe12982178c2c489d76 (patch) | |
| tree | ae13958ffa9c6b58c2ea97aac07a4ad2f04a350f /cpu/ixp/npe | |
| parent | 71edc271816ec82cf0550dd6980be2da3cc2ad9e (diff) | |
rename CFG_ macros to CONFIG_SYS
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'cpu/ixp/npe')
| -rw-r--r-- | cpu/ixp/npe/include/npe.h | 6 | ||||
| -rw-r--r-- | cpu/ixp/npe/npe.c | 12 |
2 files changed, 9 insertions, 9 deletions
diff --git a/cpu/ixp/npe/include/npe.h b/cpu/ixp/npe/include/npe.h index e53458def..3d6f72747 100644 --- a/cpu/ixp/npe/include/npe.h +++ b/cpu/ixp/npe/include/npe.h @@ -27,10 +27,10 @@ /* * defines... */ -#define CFG_NPE_NUMS 1 +#define CONFIG_SYS_NPE_NUMS 1 #ifdef CONFIG_HAS_ETH1 -#undef CFG_NPE_NUMS -#define CFG_NPE_NUMS 2 +#undef CONFIG_SYS_NPE_NUMS +#define CONFIG_SYS_NPE_NUMS 2 #endif #define NPE_NUM_PORTS 3 diff --git a/cpu/ixp/npe/npe.c b/cpu/ixp/npe/npe.c index 892096b26..bd77fed37 100644 --- a/cpu/ixp/npe/npe.c +++ b/cpu/ixp/npe/npe.c @@ -51,7 +51,7 @@ static int npe_exists[NPE_NUM_PORTS]; static int npe_used[NPE_NUM_PORTS]; /* A little extra so we can align to cacheline. */ -static u8 npe_alloc_pool[NPE_MEM_POOL_SIZE + CFG_CACHELINE_SIZE - 1]; +static u8 npe_alloc_pool[NPE_MEM_POOL_SIZE + CONFIG_SYS_CACHELINE_SIZE - 1]; static u8 *npe_alloc_end; static u8 *npe_alloc_free; @@ -60,7 +60,7 @@ static void *npe_alloc(int size) static int count = 0; void *p = NULL; - size = (size + (CFG_CACHELINE_SIZE-1)) & ~(CFG_CACHELINE_SIZE-1); + size = (size + (CONFIG_SYS_CACHELINE_SIZE-1)) & ~(CONFIG_SYS_CACHELINE_SIZE-1); count++; if ((npe_alloc_free + size) < npe_alloc_end) { @@ -399,7 +399,7 @@ static int npe_init(struct eth_device *dev, bd_t * bis) npe_alloc_end = npe_alloc_pool + sizeof(npe_alloc_pool); npe_alloc_free = (u8 *)(((unsigned)npe_alloc_pool + - CFG_CACHELINE_SIZE - 1) & ~(CFG_CACHELINE_SIZE - 1)); + CONFIG_SYS_CACHELINE_SIZE - 1) & ~(CONFIG_SYS_CACHELINE_SIZE - 1)); /* initialize mbuf pool */ init_rx_mbufs(p_npe); @@ -568,7 +568,7 @@ int npe_initialize(bd_t * bis) int eth_num = 0; struct npe *p_npe = NULL; - for (eth_num = 0; eth_num < CFG_NPE_NUMS; eth_num++) { + for (eth_num = 0; eth_num < CONFIG_SYS_NPE_NUMS; eth_num++) { /* See if we can actually bring up the interface, otherwise, skip it */ switch (eth_num) { @@ -673,8 +673,8 @@ int npe_initialize(bd_t * bis) npe_alloc_end = npe_alloc_pool + sizeof(npe_alloc_pool); npe_alloc_free = (u8 *)(((unsigned)npe_alloc_pool + - CFG_CACHELINE_SIZE - 1) - & ~(CFG_CACHELINE_SIZE - 1)); + CONFIG_SYS_CACHELINE_SIZE - 1) + & ~(CONFIG_SYS_CACHELINE_SIZE - 1)); if (!npe_csr_load()) return 0; |