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| author | Stefan Roese <sr@denx.de> | 2008-04-29 13:57:07 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-04-29 13:57:07 +0200 |
| commit | 85ad184b3b2b0f8af9228477303c55dca1b52ed7 (patch) | |
| tree | 53f6f23530d286249a22e1c65722954421681f27 /cpu/ppc4xx/start.S | |
| parent | 135846d6ecaad255ad28d93ebbb78b3d5da68cdc (diff) | |
ppc4xx: Complete remove bogus dflush()
Since the current dflush() implementation is know to have some problems
(as seem on lwmon5 ECC init) this patch removes it completely and replaces
it by using clean_dcache_range().
Tested on Katmai with ECC DIMM.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'cpu/ppc4xx/start.S')
| -rw-r--r-- | cpu/ppc4xx/start.S | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index 8d2777dcd..a513b4507 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -1675,35 +1675,6 @@ trap_reloc: sync blr function_epilog(dcbz_area) - -/*----------------------------------------------------------------------------+ -| dflush. Assume 32K at vector address is cachable. -+----------------------------------------------------------------------------*/ - function_prolog(dflush) - mfmsr r9 - rlwinm r8,r9,0,15,13 - rlwinm r8,r8,0,17,15 - mtmsr r8 - mfspr r8,dvlim - addi r3,r0,0x0000 - mtspr dvlim,r3 - mfspr r3,ivpr - addi r4,r0,1024 - mtctr r4 -..dflush_loop: - lwz r6,0x0(r3) - addi r3,r3,32 - bdnz ..dflush_loop - addi r3,r3,-32 - mtctr r4 -..ag: dcbf r0,r3 - addi r3,r3,-32 - bdnz ..ag - mtspr dvlim,r8 - sync - mtmsr r9 - blr - function_epilog(dflush) #endif /* CONFIG_440 */ #endif /* CONFIG_NAND_SPL */ |