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authorMichael Brandt <Michael.Brandt@stericsson.com>2010-01-04 13:55:56 +0100
committerMichael Brandt <Michael.Brandt@stericsson.com>2010-01-04 13:55:56 +0100
commit1cee06e7df9cb7158c318dba30f22b90d099cf6c (patch)
treee885525c7142d12adce3c6848b03bcde9a152077 /cpu
parent99fbc2780bf5880035d2c33a6791052d37d327e4 (diff)
parent63eb3ec88742b03283131d078053a8e3efe32975 (diff)
Merge branch 'boottime' into mop500
Conflicts: .gitignore include/configs/u8500.h
Diffstat (limited to 'cpu')
-rwxr-xr-xcpu/arm_cortexa9/stw8500/timer.c42
1 files changed, 37 insertions, 5 deletions
diff --git a/cpu/arm_cortexa9/stw8500/timer.c b/cpu/arm_cortexa9/stw8500/timer.c
index 16067c900..7b4092a9b 100755
--- a/cpu/arm_cortexa9/stw8500/timer.c
+++ b/cpu/arm_cortexa9/stw8500/timer.c
@@ -23,33 +23,57 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/mtu.h>
+#include <asm/boottime.h>
/*
* The timer is a decrementer, we'll left it free running at 2.4MHz.
* We have 2.4 ticks per microsecond and an overflow in almost 30min
+ *
+ * EABEJON: On HREF (atleast) there is no way the timer runs at 2.4MHz
+ * It is more likely that it around ~100 MHz with 1 as perscaler.
+ * Changing the perscaler setting to 16 gives a timer decrease rate of
+ * ~6.25MHz.
+ *
+ * Use the 3rd counter on MTU0 and let it run free since we're interested
+ * in how long time it takes to boot uboot+linux. Linux ux500 uses MTU0,
+ * timer0 and MTU1, timer0.
+ *
*/
+
+#if 0
#define TIMER_CLOCK (24 * 100 * 1000)
#define COUNT_TO_USEC(x) ((x) * 5 / 12) /* overflows at 6min */
#define USEC_TO_COUNT(x) ((x) * 12 / 5) /* overflows at 6min */
+#endif
+
+#define TIMER_CLOCK (625 * 10 * 1000)
+#define COUNT_TO_USEC(x) ((x) * 4 / 25)
+#define USEC_TO_COUNT(x) ((x) * 25 / 4)
+
#define TICKS_PER_HZ (TIMER_CLOCK / CONFIG_SYS_HZ)
#define TICKS_TO_HZ(x) ((x) / TICKS_PER_HZ)
+/* Timer on MTU0 (from 0 to 3) */
+#define MTU_TIMER 2
+
+
/* macro to read the 32 bit timer: since it decrements, we invert read value */
-#define READ_TIMER() (~readl(CONFIG_SYS_TIMERBASE + MTU_VAL(0)))
+#define READ_TIMER() (~readl(CONFIG_SYS_TIMERBASE + MTU_VAL(MTU_TIMER)))
-/* Configure a free-running, auto-wrap counter with no prescaler */
+/* Configure a free-running, auto-wrap counter with division by 16 as prescaler */
int timer_init(void)
{
- writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_1 | MTU_CRn_32BITS,
- CONFIG_SYS_TIMERBASE + MTU_CR(0));
+ writel(MTU_CRn_ENA | MTU_CRn_PRESCALE_16 | MTU_CRn_32BITS,
+ CONFIG_SYS_TIMERBASE + MTU_CR(MTU_TIMER));
reset_timer();
+ boottime_tag_uboot_init();
return 0;
}
/* Restart counting from 0 */
void reset_timer(void)
{
- writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(0)); /* Immediate effect */
+ writel(0, CONFIG_SYS_TIMERBASE + MTU_LR(MTU_TIMER)); /* Immediate effect */
}
/* Return how many HZ passed since "base" */
@@ -58,6 +82,14 @@ ulong get_timer(ulong base)
return TICKS_TO_HZ(READ_TIMER()) - base;
}
+
+/* Return how many HZ passed since "base" */
+ulong get_raw_timer(void)
+{
+ return READ_TIMER();
+}
+
+
/* Delay x useconds */
void udelay(unsigned long usec)
{