diff options
| author | Michael Brandt <Michael.Brandt@stericsson.com> | 2010-01-07 16:08:03 +0100 |
|---|---|---|
| committer | Michael Brandt <Michael.Brandt@stericsson.com> | 2010-01-07 16:08:03 +0100 |
| commit | d157ec3412960375dee37e7845bb5e6315397d6a (patch) | |
| tree | f557b605f8d9eaeac8b89ea5eb29308d6271c8aa /cpu | |
| parent | 55e1520985c4d0f3fdce2f27873b4231790b8c3d (diff) | |
PACK3 changes
applied PACK3 changes:
* cpu/arm_cortexa9/start.S: reset register changed, but U-Boot reset
command still does not work.
* config.mk: build address changed to 0x05FC0000
* board/st/u8500/mmc.c: MBR change: descrease 4th partition size (userfs
2) from 0x00c0'0000 to 0x00b9'a000 sectors (6,442,450,944 to
6,228,541,440 bytes).
* board\st\u8500\init_mmc.c: modify bootargs to set board_id to HREF or
MOP. Is is an extremly ugly solution. It modifies the bootargs env
variable directly (bootargs[9] = board_id;), instead of setting a
additional environment variable board_id and use it in the bootargs
envvar.
* board/st/u8500/mmc.c: undocumented clock changes.
* board/st/u8500/mmc_utils.c:
new routine to switch to 4-bit interface.
The switch is done in mmc_read_file(). It would make more sense
to do so in mmc_init.
* board/st/u8500/u8500.c:
clock changes for HSI and I2C. I2C is now clocked by SOC1 PLL and runs
with 24 MHz (depends on boot ROM SOC1 initialisation)
Diffstat (limited to 'cpu')
| -rw-r--r--[-rwxr-xr-x] | cpu/arm_cortexa9/start.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/cpu/arm_cortexa9/start.S b/cpu/arm_cortexa9/start.S index 62c9e5a53..40c619b97 100755..100644 --- a/cpu/arm_cortexa9/start.S +++ b/cpu/arm_cortexa9/start.S @@ -510,7 +510,7 @@ reset_cpu: #if defined CONFIG_U8500 ldr r0, =CFG_PRCMU_BASE ldr r1, =0x1 - str r1, [r0, #0x1F0] + str r1, [r0, #0x228] #else ldr r1, rstctl @ get addr for global reset @ reg |