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authorWolfgang Denk <wd@denx.de>2009-12-15 23:38:34 +0100
committerWolfgang Denk <wd@denx.de>2009-12-15 23:38:34 +0100
commitbb3bcfa2426cc6a0aecec7270e3ee67ca843a125 (patch)
tree0314e3d8e8d9e4d568a496fca27db33d66e68bb4 /drivers/mtd/nand/s3c2410_nand.c
parenta200a7c04d89853d2a1395b96d8ca5e3dd754551 (diff)
parent4b142febff71eabdb7ddbb125c7b583b24ddc434 (diff)
Merge branch 'next' of ../next
Diffstat (limited to 'drivers/mtd/nand/s3c2410_nand.c')
-rw-r--r--drivers/mtd/nand/s3c2410_nand.c33
1 files changed, 28 insertions, 5 deletions
diff --git a/drivers/mtd/nand/s3c2410_nand.c b/drivers/mtd/nand/s3c2410_nand.c
index f2f3e722e..a27d47e5f 100644
--- a/drivers/mtd/nand/s3c2410_nand.c
+++ b/drivers/mtd/nand/s3c2410_nand.c
@@ -21,7 +21,7 @@
#include <common.h>
#include <nand.h>
-#include <s3c2410.h>
+#include <asm/arch/s3c24x0_cpu.h>
#include <asm/io.h>
#define S3C2410_NFCONF_EN (1<<15)
@@ -36,6 +36,21 @@
#define S3C2410_ADDR_NALE 4
#define S3C2410_ADDR_NCLE 8
+#ifdef CONFIG_NAND_SPL
+
+/* in the early stage of NAND flash booting, printf() is not available */
+#define printf(fmt, args...)
+
+static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
+{
+ int i;
+ struct nand_chip *this = mtd->priv;
+
+ for (i = 0; i < len; i++)
+ buf[i] = readb(this->IO_ADDR_R);
+}
+#endif
+
static void s3c2410_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
{
struct nand_chip *chip = mtd->priv;
@@ -83,9 +98,10 @@ void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode)
static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
u_char *ecc_code)
{
- ecc_code[0] = NFECC0;
- ecc_code[1] = NFECC1;
- ecc_code[2] = NFECC2;
+ struct s3c2410_nand *nand = s3c2410_get_base_nand();
+ ecc_code[0] = readb(&nand->NFECC);
+ ecc_code[1] = readb(&nand->NFECC + 1);
+ ecc_code[2] = readb(&nand->NFECC + 2);
debugX(1, "s3c2410_nand_calculate_hwecc(%p,): 0x%02x 0x%02x 0x%02x\n",
mtd , ecc_code[0], ecc_code[1], ecc_code[2]);
@@ -130,8 +146,13 @@ int board_nand_init(struct nand_chip *nand)
/* initialize nand_chip data structure */
nand->IO_ADDR_R = nand->IO_ADDR_W = (void *)&nand_reg->NFDATA;
+ nand->select_chip = NULL;
+
/* read_buf and write_buf are default */
/* read_byte and write_byte are default */
+#ifdef CONFIG_NAND_SPL
+ nand->read_buf = nand_read_buf;
+#endif
/* hwcontrol always must be implemented */
nand->cmd_ctrl = s3c2410_hwcontrol;
@@ -142,7 +163,9 @@ int board_nand_init(struct nand_chip *nand)
nand->ecc.hwctl = s3c2410_nand_enable_hwecc;
nand->ecc.calculate = s3c2410_nand_calculate_ecc;
nand->ecc.correct = s3c2410_nand_correct_data;
- nand->ecc.mode = NAND_ECC_HW3_512;
+ nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
+ nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
#else
nand->ecc.mode = NAND_ECC_SOFT;
#endif