diff options
| author | Sandeep Paulraj <s-paulraj@ti.com> | 2009-09-18 17:30:05 -0400 |
|---|---|---|
| committer | Tom Rix <Tom.Rix@windriver.com> | 2009-10-13 06:17:37 -0500 |
| commit | 95ae803afbdd9f673c94b992ea624a10d252afc2 (patch) | |
| tree | 12ac75daad17d61a281b68cb6da4778f4156a389 /include/asm-arm | |
| parent | fc9165fdb3b021aa8ff02417692220fe9344072b (diff) | |
TI: DaVinci DM646x: Update flag used to represent DM646x SOC's
In the DaVinci specific code, we use both CONFIG_SOC_DM646X and
CONFIG_SOC_DM646x to represent DM646x specific code.
This patch changes occurrences of CONFIG_SOC_DM646x to
CONFIG_SOC_DM646X. This is because for DM644x series of SOCs we use
the flag CONFIG_SOC_DM644X. We want some uniformity.
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
Diffstat (limited to 'include/asm-arm')
| -rw-r--r-- | include/asm-arm/arch-davinci/emac_defs.h | 4 | ||||
| -rw-r--r-- | include/asm-arm/arch-davinci/nand_defs.h | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/include/asm-arm/arch-davinci/emac_defs.h b/include/asm-arm/arch-davinci/emac_defs.h index ae75f8404..96bc80e47 100644 --- a/include/asm-arm/arch-davinci/emac_defs.h +++ b/include/asm-arm/arch-davinci/emac_defs.h @@ -50,7 +50,7 @@ #define EMAC_MDIO_BASE_ADDR (0x01c84000) #endif -#ifdef CONFIG_SOC_DM646x +#ifdef CONFIG_SOC_DM646X /* MDIO module input frequency */ #define EMAC_MDIO_BUS_FREQ 76500000 /* MDIO clock output frequency */ @@ -283,7 +283,7 @@ typedef struct { /* EMAC Wrapper Registers Structure */ typedef struct { -#if defined(CONFIG_SOC_DM646x) || defined(CONFIG_SOC_DM365) +#if defined(CONFIG_SOC_DM646X) || defined(CONFIG_SOC_DM365) dv_reg IDVER; dv_reg SOFTRST; dv_reg EMCTRL; diff --git a/include/asm-arm/arch-davinci/nand_defs.h b/include/asm-arm/arch-davinci/nand_defs.h index 386540e41..10f3a392a 100644 --- a/include/asm-arm/arch-davinci/nand_defs.h +++ b/include/asm-arm/arch-davinci/nand_defs.h @@ -28,7 +28,7 @@ #include <asm/arch/hardware.h> -#ifdef CONFIG_SOC_DM646x +#ifdef CONFIG_SOC_DM646X #define MASK_CLE 0x80000 #define MASK_ALE 0x40000 #else |