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authorHaavard Skinnemoen <hskinnemoen@atmel.com>2008-01-23 17:20:14 +0100
committerHaavard Skinnemoen <hskinnemoen@atmel.com>2008-02-05 12:14:27 +0100
commitd38da537943cd36356b9d3d9d9b60533554b81d8 (patch)
tree6263c715346047e4cda757dff839f4e1052652b7 /include/asm-avr32/sdram.h
parent61151cccb660cdb06a07fb283de6089913d7bde0 (diff)
AVR32: Make SDRAM refresh rate configurable
The existing code assumes the SDRAM row refresh period should always be 15.6 us. This is not always true, and indeed on the ATNGW100, the refresh rate should really be 7.81 us. Add a refresh_period member to struct sdram_info and initialize it properly for both ATSTK1000 and ATNGW100. Out-of-tree boards will panic() until the refresh_period member is updated properly. Big thanks to Gerhard Berghofer for pointing out this issue. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Diffstat (limited to 'include/asm-avr32/sdram.h')
-rw-r--r--include/asm-avr32/sdram.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/asm-avr32/sdram.h b/include/asm-avr32/sdram.h
index 5057eefa8..833af6e6a 100644
--- a/include/asm-avr32/sdram.h
+++ b/include/asm-avr32/sdram.h
@@ -26,6 +26,9 @@ struct sdram_info {
unsigned long phys_addr;
unsigned int row_bits, col_bits, bank_bits;
unsigned int cas, twr, trc, trp, trcd, tras, txsr;
+
+ /* SDRAM refresh period in cycles */
+ unsigned long refresh_period;
};
extern unsigned long sdram_init(const struct sdram_info *info);