diff options
| author | stroese <stroese> | 2004-12-16 18:05:42 +0000 |
|---|---|---|
| committer | stroese <stroese> | 2004-12-16 18:05:42 +0000 |
| commit | a20b27a36b7b1f593e18b4efd506e5f01a392dc6 (patch) | |
| tree | f9dc45c287966bb96c38a8267d07b217727efb3c /include/configs/HUB405.h | |
| parent | 44acc8d334a8b9ddb81fc238b094574991f19afa (diff) | |
esd config files updated
Diffstat (limited to 'include/configs/HUB405.h')
| -rw-r--r-- | include/configs/HUB405.h | 35 |
1 files changed, 21 insertions, 14 deletions
diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h index ff0d8d08c..57212e0f6 100644 --- a/include/configs/HUB405.h +++ b/include/configs/HUB405.h @@ -35,32 +35,28 @@ #define CONFIG_405EP 1 /* This is a PPC405 CPU */ #define CONFIG_4xx 1 /* ...member of PPC4xx family */ -#define CONFIG_HUB405 1 /* ...on a ASH405 board */ +#define CONFIG_HUB405 1 /* ...on a HUB405 board */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */ #define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */ -#define CONFIG_SYS_CLK_FREQ 33333334 /* external frequency to pll */ +#define CONFIG_SYS_CLK_FREQ 33330000 /* external frequency to pll */ #define CONFIG_BAUDRATE 9600 #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ #undef CONFIG_BOOTARGS -#define CONFIG_RAMBOOTCOMMAND \ - "setenv bootargs root=/dev/ram rw nfsroot=$(serverip):$(rootpath) " \ - "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \ - "bootm ffc00000 ffca0000" -#define CONFIG_NFSBOOTCOMMAND \ - "setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \ - "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;" \ - "bootm ffc00000" -#define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND - -#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ +#undef CONFIG_BOOTCOMMAND + +#define CONFIG_PREBOOT /* enable preboot variable */ + #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_PHY_ADDR 0 /* PHY address */ +#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */ + +#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/ #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ CFG_CMD_DHCP | \ @@ -127,6 +123,11 @@ #define CFG_RX_ETH_BUFFER 16 /* use 16 rx buffer on 405 emac */ +/* Ethernet stuff */ +#define CONFIG_ENV_OVERWRITE /* Let the user to change the Ethernet MAC addresses */ +#define CONFIG_ETHADDR 00:50:C2:1E:AF:FE +#define CONFIG_ETH1ADDR 00:50:C2:1E:AF:FD + /*----------------------------------------------------------------------- * NAND-FLASH stuff *----------------------------------------------------------------------- @@ -160,6 +161,8 @@ #define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0) #define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr)) +#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */ + /*----------------------------------------------------------------------- * PCI stuff *----------------------------------------------------------------------- @@ -352,7 +355,11 @@ #define CFG_GPIO0_TSRL 0x00000000 #define CFG_GPIO0_TCR 0xF7FE0014 -#define CFG_DUART_RST (0x80000000 >> 14) +#define CFG_DUART_RST (0x80000000 >> 14) +#define CFG_UART2_RS232 (0x80000000 >> 5) +#define CFG_UART3_RS232 (0x80000000 >> 6) +#define CFG_UART4_RS232 (0x80000000 >> 7) +#define CFG_UART5_RS232 (0x80000000 >> 8) /* * Internal Definitions |