diff options
| author | Ben Warren <biggerbadderben@gmail.com> | 2008-01-16 22:37:42 -0500 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2008-01-17 11:02:33 -0600 |
| commit | 80ddd22626d321a772ebfba304eb7830cb4f6bac (patch) | |
| tree | 9132a55b467d6d7728a370d0b76e072ba5a57add /include/configs/MPC8349EMDS.h | |
| parent | 04a9e1180ac76a7bacc15a6fcd95ad839d65bddb (diff) | |
Implement hard SPI driver on MPC8349EMDS
This patch implements the fsl_spi driver on the MPC8349EMDS evaluation board.
This board has an ST M25P40 4Mbit EEPROM on its SPI bus
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs/MPC8349EMDS.h')
| -rw-r--r-- | include/configs/MPC8349EMDS.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h index 437a9a5f7..584c59de4 100644 --- a/include/configs/MPC8349EMDS.h +++ b/include/configs/MPC8349EMDS.h @@ -355,6 +355,16 @@ #define CFG_I2C_OFFSET 0x3000 #define CFG_I2C2_OFFSET 0x3100 +/* SPI */ +#define CONFIG_HARD_SPI /* SPI with hardware support*/ +#undef CONFIG_SOFT_SPI /* SPI bit-banged */ +#define CONFIG_FSL_SPI + +/* GPIOs. Used as SPI chip selects */ +#define CFG_GPIO1_PRELIM +#define CFG_GPIO1_DIR 0xC0000000 /* SPI CS on 0, LED on 1 */ +#define CFG_GPIO1_DAT 0xC0000000 /* Both are active LOW */ + /* TSEC */ #define CFG_TSEC1_OFFSET 0x24000 #define CFG_TSEC1 (CFG_IMMR+CFG_TSEC1_OFFSET) |