summaryrefslogtreecommitdiff
path: root/include/configs/MPC8349ITX.h
diff options
context:
space:
mode:
authorTimur Tabi <timur@freescale.com>2008-02-08 13:15:55 -0600
committerKim Phillips <kim.phillips@freescale.com>2008-03-25 19:16:43 -0500
commit89c7784ed90ba50301eec521144f95111e472906 (patch)
tree6e2ed88c42e80fbc454de5de9337d53c1cfc9ad1 /include/configs/MPC8349ITX.h
parentb55d98c6d5b8694e560a0e727b14cb6921d7cfcc (diff)
83xx: Add Vitesse VSC7385 firmware uploading
Update the MPC8349E-mITX, MPC8313E-RDB, and MPC837XE-RDB board files to upload the Vitesse VSC7385 firmware. Changed CONFIG_VSC7385 to CONFIG_VSC7385_ENET. Cleaned up the board header files to make selecting the VSC7385 easier to control. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs/MPC8349ITX.h')
-rw-r--r--include/configs/MPC8349ITX.h33
1 files changed, 23 insertions, 10 deletions
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 48c2736fc..0e5018676 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -68,12 +68,16 @@
#define CFG_IMMR 0xE0000000 /* The IMMR is relocated to here */
+#define CONFIG_MISC_INIT_F
+#define CONFIG_MISC_INIT_R
-/* On-board devices */
+/*
+ * On-board devices
+ */
#ifdef CONFIG_MPC8349ITX
#define CONFIG_COMPACT_FLASH /* The CF card interface on the back of the board */
-#define CONFIG_VSC7385 /* The Vitesse 7385 5-port switch */
+#define CONFIG_VSC7385_ENET /* VSC7385 ethernet support */
#endif
#define CONFIG_PCI
@@ -88,9 +92,6 @@
/* I2C */
#ifdef CONFIG_HARD_I2C
-#define CONFIG_MISC_INIT_F
-#define CONFIG_MISC_INIT_R
-
#define CONFIG_FSL_I2C
#define CONFIG_I2C_MULTI_BUS
#define CONFIG_I2C_CMD_TREE
@@ -190,6 +191,18 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CFG_FLASH_SIZE 16 /* FLASH size in MB */
#define CFG_FLASH_SIZE_SHIFT 4 /* log2 of the above value */
+/* Vitesse 7385 */
+
+#ifdef CONFIG_VSC7385_ENET
+
+#define CONFIG_TSEC2
+
+/* The flash address and size of the VSC7385 firmware image */
+#define CONFIG_VSC7385_IMAGE 0xFEFFE000
+#define CONFIG_VSC7385_IMAGE_SIZE 8192
+
+#endif
+
/*
* BRx, ORx, LBLAWBARx, and LBLAWARx
*/
@@ -205,10 +218,10 @@ boards, we say we have two, but don't display a message if we find only one. */
/* Vitesse 7385 */
-#ifdef CONFIG_VSC7385
-
#define CFG_VSC7385_BASE 0xF8000000
+#ifdef CONFIG_VSC7385_ENET
+
#define CFG_BR1_PRELIM (CFG_VSC7385_BASE | BR_PS_8 | BR_V)
#define CFG_OR1_PRELIM (OR_AM_128KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
OR_GPCM_SCY_15 | OR_GPCM_SETA | OR_GPCM_TRLX | \
@@ -384,7 +397,7 @@ boards, we say we have two, but don't display a message if we find only one. */
#define CONFIG_HAS_ETH1
#define CONFIG_TSEC2_NAME "TSEC1"
#define CFG_TSEC2_OFFSET 0x25000
-#define CONFIG_UNKNOWN_TSEC /* TSEC2 is proprietary */
+
#define TSEC2_PHY_ADDR 4
#define TSEC2_PHYIDX 0
#define TSEC2_FLAGS TSEC_GIGABIT
@@ -619,11 +632,11 @@ boards, we say we have two, but don't display a message if we find only one. */
*/
#define CONFIG_ENV_OVERWRITE
-#ifdef CONFIG_TSEC1
+#ifdef CONFIG_HAS_ETH0
#define CONFIG_ETHADDR 00:E0:0C:00:8C:01
#endif
-#ifdef CONFIG_TSEC2
+#ifdef CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:E0:0C:00:8C:02
#endif