diff options
| author | Anton Vorontsov <avorontsov@ru.mvista.com> | 2009-12-16 01:14:31 +0300 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-01-05 13:49:10 -0600 |
| commit | c4ca10f1db36c3ce649c656dec14f7aab644dd86 (patch) | |
| tree | ff84a6f10476c14fedfda3f0ed314a5b9c80f496 /include/configs/MPC8569MDS.h | |
| parent | bc20f9a9527afe8ae406a74f74765d4323f04922 (diff) | |
mpc85xx: Add 4-bits eSDHC support for MPC8569E-MDS boards
Thanks to "Errata to MPC8569E PowerQUICC III Integrated Host Processor
Family Reference Manual, Rev. 0" document, which describes all eSDHC
pins, we can add 4-bits eSDHC support for MPC8569E-MDS boards.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include/configs/MPC8569MDS.h')
| -rw-r--r-- | include/configs/MPC8569MDS.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 1e659e27a..e16f0e147 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -277,6 +277,10 @@ extern unsigned long get_clock_freq(void); #define PLPDIR1_I2C_BIT_MASK 0x0000000F #define PLPDIR1_I2C2_VAL 0x0000000F #define PLPDIR1_ESDHC_VAL 0x00000006 +#define PLPPAR1_UART0_BIT_MASK 0x00000fc0 +#define PLPPAR1_ESDHC_4BITS_VAL 0x00000a80 +#define PLPDIR1_UART0_BIT_MASK 0x00000fc0 +#define PLPDIR1_ESDHC_4BITS_VAL 0x00000a80 /* * General PCI |