diff options
| author | Timur Tabi <timur@freescale.com> | 2006-11-03 12:00:28 -0600 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2006-11-03 19:42:23 -0600 |
| commit | d239d74b1c937984bc519083a8e7de373a390f06 (patch) | |
| tree | 1311b60e3d00017bbe694570128d08e9699a2a24 /include/configs/TQM834x.h | |
| parent | f7fb2e703ec9688541416962724adff70a7322cb (diff) | |
mpc83xx: Replace CFG_IMMRBAR with CFG_IMMR
Replace all instances of CFG_IMMRBAR with CFG_IMMR, so that the 83xx
tree matches the other 8xxx trees.
Signed-off-by: Timur Tabi <timur@freescale.com>
Diffstat (limited to 'include/configs/TQM834x.h')
| -rw-r--r-- | include/configs/TQM834x.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h index 727094b20..b0b0673cf 100644 --- a/include/configs/TQM834x.h +++ b/include/configs/TQM834x.h @@ -41,7 +41,7 @@ #define CONFIG_TQM834X 1 /* TQM834X board specific */ /* IMMR Base Addres Register, use Freescale default: 0xff400000 */ -#define CFG_IMMRBAR 0xff400000 +#define CFG_IMMR 0xff400000 /* System clock. Primary input clock when in PCI host mode */ #define CONFIG_83XX_CLKIN 66666000 /* 66,666 MHz */ @@ -210,8 +210,8 @@ extern int tqm834x_num_flash_banks; #define CFG_BAUDRATE_TABLE \ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200} -#define CFG_NS16550_COM1 (CFG_IMMRBAR + 0x4500) -#define CFG_NS16550_COM2 (CFG_IMMRBAR + 0x4600) +#define CFG_NS16550_COM1 (CFG_IMMR + 0x4500) +#define CFG_NS16550_COM2 (CFG_IMMR + 0x4600) /* * I2C @@ -248,9 +248,9 @@ extern int tqm834x_num_flash_banks; #define CONFIG_MII #define CFG_TSEC1_OFFSET 0x24000 -#define CFG_TSEC1 (CFG_IMMRBAR + CFG_TSEC1_OFFSET) +#define CFG_TSEC1 (CFG_IMMR + CFG_TSEC1_OFFSET) #define CFG_TSEC2_OFFSET 0x25000 -#define CFG_TSEC2 (CFG_IMMRBAR + CFG_TSEC2_OFFSET) +#define CFG_TSEC2 (CFG_IMMR + CFG_TSEC2_OFFSET) #if defined(CONFIG_TSEC_ENET) @@ -473,8 +473,8 @@ extern int tqm834x_num_flash_banks; #endif /* IMMRBAR */ -#define CFG_IBAT6L (CFG_IMMRBAR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) -#define CFG_IBAT6U (CFG_IMMRBAR | BATU_BL_1M | BATU_VS | BATU_VP) +#define CFG_IBAT6L (CFG_IMMR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) +#define CFG_IBAT6U (CFG_IMMR | BATU_BL_1M | BATU_VS | BATU_VP) /* FLASH */ #define CFG_IBAT7L (CFG_FLASH_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) |