diff options
| author | Ladislav Michl <ladis@linux-mips.org> | 2009-04-22 01:12:04 +0200 |
|---|---|---|
| committer | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2009-04-29 21:39:46 +0200 |
| commit | 3791a1187c1401c33c9512595e6e89dbb46230c5 (patch) | |
| tree | 89d786b2fc8ac072d23b68ac6eca7f0266f7b4f5 /include/configs/netstar.h | |
| parent | 42bf4b2248146abdc592bde0009c6ea42067f437 (diff) | |
arm925t: Fix CONFIG_SYS_HZ to 1000
Let CONFIG_SYS_HZ to have value of 1000 effectively fixing all users of
get_timer.
Changes since original version:
* Set PTV=2 (divisor 8) for boards using 12MHz timer clock source to
improve timer resolution.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Diffstat (limited to 'include/configs/netstar.h')
| -rw-r--r-- | include/configs/netstar.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/include/configs/netstar.h b/include/configs/netstar.h index 39560de3c..5cfee6622 100644 --- a/include/configs/netstar.h +++ b/include/configs/netstar.h @@ -222,12 +222,12 @@ #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1 + 0x400000 /* default load address */ -/* The 1510 has 3 timers, they can be driven by the RefClk (12Mhz) or by DPLL1. +/* The 1510 has 3 timers, they can be driven by the RefClk (12MHz) or by DPLL1. * This time is further subdivided by a local divisor. */ #define CONFIG_SYS_TIMERBASE OMAP1510_TIMER1_BASE -#define CONFIG_SYS_PTV 7 /* 2^(pvt+1), divide by 256 */ -#define CONFIG_SYS_HZ ((CONFIG_SYS_CLK_FREQ)/(2 << CONFIG_SYS_PTV)) +#define CONFIG_SYS_PTV 7 +#define CONFIG_SYS_HZ 1000 #define OMAP5910_DPLL_DIV 1 #define OMAP5910_DPLL_MUL ((CONFIG_SYS_CLK_FREQ * \ |