Merge branch 'master' of http://git.denx.de/u-boot

26 files changed, 219 insertions, 105 deletions

diff --git a/include/configs/ATUM8548.h b/include/configs/ATUM8548.h
index 91369a71e..49a86fd4c 100644
--- a/include/configs/ATUM8548.h
+++ b/include/configs/ATUM8548.h
@@ -243,27 +243,27 @@
  */
 #define CONFIG_SYS_PCI_PHYS		0x80000000	/* 1G PCI TLB */
 
-#define CONFIG_SYS_PCI1_MEM_BASE	0x80000000
-#define CONFIG_SYS_PCI1_MEM_PHYS	CONFIG_SYS_PCI1_MEM_BASE
+#define CONFIG_SYS_PCI1_MEM_BUS		0x80000000
+#define CONFIG_SYS_PCI1_MEM_PHYS	CONFIG_SYS_PCI1_MEM_BUS
 #define CONFIG_SYS_PCI1_MEM_SIZE	0x20000000	/* 512M */
-#define CONFIG_SYS_PCI1_IO_BASE	0x00000000
+#define CONFIG_SYS_PCI1_IO_BUS	0x00000000
 #define CONFIG_SYS_PCI1_IO_PHYS	0xe2000000
 #define CONFIG_SYS_PCI1_IO_SIZE	0x00100000	/* 1M */
 
 #ifdef CONFIG_PCI2
-#define CONFIG_SYS_PCI2_MEM_BASE	0xC0000000
-#define CONFIG_SYS_PCI2_MEM_PHYS	CONFIG_SYS_PCI2_MEM_BASE
+#define CONFIG_SYS_PCI2_MEM_BUS		0xC0000000
+#define CONFIG_SYS_PCI2_MEM_PHYS	CONFIG_SYS_PCI2_MEM_BUS
 #define CONFIG_SYS_PCI2_MEM_SIZE	0x20000000	/* 512M */
-#define CONFIG_SYS_PCI2_IO_BASE	0x00000000
+#define CONFIG_SYS_PCI2_IO_BUS	0x00000000
 #define CONFIG_SYS_PCI2_IO_PHYS	0xe2800000
 #define CONFIG_SYS_PCI2_IO_SIZE	0x00100000	/* 1M */
 #endif
 
 #ifdef CONFIG_PCIE1
-#define CONFIG_SYS_PCIE1_MEM_BASE	0xa0000000
-#define CONFIG_SYS_PCIE1_MEM_PHYS	CONFIG_SYS_PCIE1_MEM_BASE
+#define CONFIG_SYS_PCIE1_MEM_BUS	0xa0000000
+#define CONFIG_SYS_PCIE1_MEM_PHYS	CONFIG_SYS_PCIE1_MEM_BUS
 #define CONFIG_SYS_PCIE1_MEM_SIZE	0x20000000	/* 512M */
-#define CONFIG_SYS_PCIE1_IO_BASE	0x00000000
+#define CONFIG_SYS_PCIE1_IO_BUS		0x00000000
 #define CONFIG_SYS_PCIE1_IO_PHYS	0xe3000000
 #define CONFIG_SYS_PCIE1_IO_SIZE	0x00100000	/*   1M */
 #endif
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h
index 79376b3c5..cfed4ca9f 100644
--- a/include/configs/MPC8315ERDB.h
+++ b/include/configs/MPC8315ERDB.h
@@ -25,6 +25,11 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#ifdef CONFIG_MK_NAND
+#define CONFIG_NAND_U_BOOT		1
+#define CONFIG_RAMBOOT_TEXT_BASE	0x00100000
+#endif
+
 /*
  * High Level Configuration Options
  */
@@ -51,20 +56,29 @@
 	HRCWL_SVCOD_DIV_2 |\
 	HRCWL_CSB_TO_CLKIN_2X1 |\
 	HRCWL_CORE_TO_CSB_3X1)
-#define CONFIG_SYS_HRCW_HIGH (\
+#define CONFIG_SYS_HRCW_HIGH_BASE (\
 	HRCWH_PCI_HOST |\
 	HRCWH_PCI1_ARBITER_ENABLE |\
 	HRCWH_CORE_ENABLE |\
-	HRCWH_FROM_0X00000100 |\
 	HRCWH_BOOTSEQ_DISABLE |\
 	HRCWH_SW_WATCHDOG_DISABLE |\
-	HRCWH_ROM_LOC_LOCAL_16BIT |\
-	HRCWH_RL_EXT_LEGACY |\
 	HRCWH_TSEC1M_IN_RGMII |\
 	HRCWH_TSEC2M_IN_RGMII |\
 	HRCWH_BIG_ENDIAN |\
 	HRCWH_LALE_NORMAL)
 
+#ifdef CONFIG_NAND_SPL
+#define CONFIG_SYS_HRCW_HIGH (CONFIG_SYS_HRCW_HIGH_BASE |\
+		       HRCWH_FROM_0XFFF00100 |\
+		       HRCWH_ROM_LOC_NAND_SP_8BIT |\
+		       HRCWH_RL_EXT_NAND)
+#else
+#define CONFIG_SYS_HRCW_HIGH (CONFIG_SYS_HRCW_HIGH_BASE |\
+		       HRCWH_FROM_0X00000100 |\
+		       HRCWH_ROM_LOC_LOCAL_16BIT |\
+		       HRCWH_RL_EXT_LEGACY)
+#endif
+
 /*
  * System IO Config
  */
@@ -79,6 +93,10 @@
  */
 #define CONFIG_SYS_IMMR		0xE0000000
 
+#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#define CONFIG_DEFAULT_IMMR	CONFIG_SYS_IMMR
+#endif
+
 /*
  * Arbiter Setup
  */
@@ -161,12 +179,6 @@
  */
 #define CONFIG_SYS_MONITOR_BASE	TEXT_BASE /* start of monitor */
 
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#define CONFIG_SYS_RAMBOOT
-#else
-#undef CONFIG_SYS_RAMBOOT
-#endif
-
 #define CONFIG_SYS_MONITOR_LEN		(384 * 1024) /* Reserve 384 kB for Mon */
 #define CONFIG_SYS_MALLOC_LEN		(512 * 1024) /* Reserved for malloc */
 
@@ -200,10 +212,10 @@
 #define CONFIG_SYS_LBLAWBAR0_PRELIM	CONFIG_SYS_FLASH_BASE /* Window base at flash base */
 #define CONFIG_SYS_LBLAWAR0_PRELIM	0x80000016 /* 8MB window size */
 
-#define CONFIG_SYS_BR0_PRELIM		( CONFIG_SYS_FLASH_BASE	/* Flash Base address */ \
+#define CONFIG_SYS_NOR_BR_PRELIM	(CONFIG_SYS_FLASH_BASE \
 				| (2 << BR_PS_SHIFT)	/* 16 bit port size */ \
 				| BR_V )		/* valid */
-#define CONFIG_SYS_OR0_PRELIM		( (~(CONFIG_SYS_FLASH_SIZE - 1) << 20) \
+#define CONFIG_SYS_NOR_OR_PRELIM	((~(CONFIG_SYS_FLASH_SIZE - 1) << 20) \
 				| OR_UPM_XAM \
 				| OR_GPCM_CSNT \
 				| OR_GPCM_ACS_DIV2 \
@@ -223,18 +235,31 @@
 /*
  * NAND Flash on the Local Bus
  */
-#define CONFIG_SYS_NAND_BASE		0xE0600000	/* 0xE0600000 */
+
+#ifdef CONFIG_NAND_SPL
+#define CONFIG_SYS_NAND_BASE		0xFFF00000
+#else
+#define CONFIG_SYS_NAND_BASE		0xE0600000
+#endif
+
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_MTD_NAND_VERIFY_WRITE	1
 #define CONFIG_CMD_NAND			1
 #define CONFIG_NAND_FSL_ELBC		1
+#define CONFIG_SYS_NAND_BLOCK_SIZE 16384
+
+#define CONFIG_SYS_NAND_U_BOOT_SIZE  (512 << 10)
+#define CONFIG_SYS_NAND_U_BOOT_DST   0x00100000
+#define CONFIG_SYS_NAND_U_BOOT_START 0x00100100
+#define CONFIG_SYS_NAND_U_BOOT_OFFS  16384
+#define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000
 
-#define CONFIG_SYS_BR1_PRELIM	( CONFIG_SYS_NAND_BASE \
+#define CONFIG_SYS_NAND_BR_PRELIM	(CONFIG_SYS_NAND_BASE \
 				| (2<<BR_DECC_SHIFT)	/* Use HW ECC */ \
 				| BR_PS_8		/* Port Size = 8 bit */ \
 				| BR_MS_FCM		/* MSEL = FCM */ \
 				| BR_V )		/* valid */
-#define CONFIG_SYS_OR1_PRELIM	( 0xFFFF8000		/* length 32K */ \
+#define CONFIG_SYS_NAND_OR_PRELIM	(0xFFFF8000	/* length 32K */ \
 				| OR_FCM_CSCT \
 				| OR_FCM_CST \
 				| OR_FCM_CHT \
@@ -243,9 +268,31 @@
 				| OR_FCM_EHTR )
 				/* 0xFFFF8396 */
 
+#ifdef CONFIG_NAND_U_BOOT
+#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM
+#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM
+#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NOR_BR_PRELIM
+#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NOR_OR_PRELIM
+#else
+#define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NOR_BR_PRELIM
+#define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NOR_OR_PRELIM
+#define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM
+#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM
+#endif
+
 #define CONFIG_SYS_LBLAWBAR1_PRELIM	CONFIG_SYS_NAND_BASE
 #define CONFIG_SYS_LBLAWAR1_PRELIM	0x8000000E	/* 32KB  */
 
+#define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR1_PRELIM
+#define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR1_PRELIM
+
+#if CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE && \
+	!defined(CONFIG_NAND_SPL)
+#define CONFIG_SYS_RAMBOOT
+#else
+#undef CONFIG_SYS_RAMBOOT
+#endif
+
 /*
  * Serial Port
  */
@@ -254,7 +301,7 @@
 #define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	1
-#define CONFIG_SYS_NS16550_CLK		get_bus_freq(0)
+#define CONFIG_SYS_NS16550_CLK		(CONFIG_83XX_CLKIN * 2)
 
 #define CONFIG_SYS_BAUDRATE_TABLE  \
 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
@@ -408,7 +455,16 @@
 /*
  * Environment
  */
-#ifndef CONFIG_SYS_RAMBOOT
+#if defined(CONFIG_NAND_U_BOOT)
+	#define CONFIG_ENV_IS_IN_NAND	1
+	#define CONFIG_ENV_OFFSET		(512 * 1024)
+	#define CONFIG_ENV_SECT_SIZE	CONFIG_SYS_NAND_BLOCK_SIZE
+	#define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
+	#define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
+	#define CONFIG_ENV_RANGE	(CONFIG_ENV_SECT_SIZE * 4)
+	#define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + \
+						 CONFIG_ENV_RANGE)
+#elif !defined(CONFIG_SYS_RAMBOOT)
 	#define CONFIG_ENV_IS_IN_FLASH	1
 	#define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
 	#define CONFIG_ENV_SECT_SIZE	0x10000 /* 64K(one sector) for env */
@@ -442,7 +498,7 @@
 #define CONFIG_CMD_DATE
 #define CONFIG_CMD_PCI
 
-#if defined(CONFIG_SYS_RAMBOOT)
+#if defined(CONFIG_SYS_RAMBOOT) && !defined(CONFIG_NAND_U_BOOT)
     #undef CONFIG_CMD_SAVEENV
     #undef CONFIG_CMD_LOADS
 #endif
@@ -504,7 +560,8 @@
 
 /* FLASH: icache cacheable, but dcache-inhibit and guarded */
 #define CONFIG_SYS_IBAT2L	(CONFIG_SYS_FLASH_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
-#define CONFIG_SYS_IBAT2U	(CONFIG_SYS_FLASH_BASE | BATU_BL_8M | BATU_VS | BATU_VP)
+#define CONFIG_SYS_IBAT2U	(CONFIG_SYS_FLASH_BASE | BATU_BL_32M | \
+				 BATU_VS | BATU_VP)
 #define CONFIG_SYS_DBAT2L	(CONFIG_SYS_FLASH_BASE | BATL_PP_10 | \
 			BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_DBAT2U	CONFIG_SYS_IBAT2U
diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h
index 1e659e27a..e16f0e147 100644
--- a/include/configs/MPC8569MDS.h
+++ b/include/configs/MPC8569MDS.h
@@ -277,6 +277,10 @@ extern unsigned long get_clock_freq(void);
 #define PLPDIR1_I2C_BIT_MASK		0x0000000F
 #define PLPDIR1_I2C2_VAL		0x0000000F
 #define PLPDIR1_ESDHC_VAL		0x00000006
+#define PLPPAR1_UART0_BIT_MASK		0x00000fc0
+#define PLPPAR1_ESDHC_4BITS_VAL		0x00000a80
+#define PLPDIR1_UART0_BIT_MASK		0x00000fc0
+#define PLPDIR1_ESDHC_4BITS_VAL		0x00000a80
 
 /*
  * General PCI
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 41e4a6e8a..78b73695b 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -98,7 +98,6 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
 #define CONFIG_SYS_PCIE1_ADDR		(CONFIG_SYS_CCSRBAR+0xa000)
 
 /* DDR Setup */
-#define CONFIG_SYS_DDR_TLB_START 9
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index ddfe7aabd..15bfeefa4 100644
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -149,8 +149,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_DDR_ERR_DIS		0x00000000
 #define CONFIG_SYS_DDR_SBE		0x00FF0000
 
-#define CONFIG_SYS_DDR_TLB_START 9
-
 /*
  * Memory map
  *
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index df9ab34e8..f4509bd09 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -101,7 +101,6 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
 #define CONFIG_SYS_PCIE1_ADDR		(CONFIG_SYS_CCSRBAR+0xa000)
 
 /* DDR Setup */
-#define CONFIG_SYS_DDR_TLB_START 9
 #define CONFIG_VERY_BIG_RAM
 #define CONFIG_FSL_DDR3		1
 #undef CONFIG_FSL_DDR_INTERACTIVE
diff --git a/include/configs/apollon.h b/include/configs/apollon.h
index ed14f7aa6..c1295de36 100644
--- a/include/configs/apollon.h
+++ b/include/configs/apollon.h
@@ -185,10 +185,8 @@
 /*
  * Miscellaneous configurable options
  */
-#define	V_PROMPT	"Apollon # "
-
 #define	CONFIG_SYS_LONGHELP	/* undef to save memory */
-#define	CONFIG_SYS_PROMPT	V_PROMPT
+#define	CONFIG_SYS_PROMPT	"Apollon # "
 #define	CONFIG_SYS_CBSIZE	256	/* Console I/O Buffer Size */
 /* Print Buffer Size */
 #define	CONFIG_SYS_PBSIZE	(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
diff --git a/include/configs/da830evm.h b/include/configs/da830evm.h
index 38e2ce1f1..432cd57a7 100644
--- a/include/configs/da830evm.h
+++ b/include/configs/da830evm.h
@@ -149,6 +149,11 @@
 #define CONFIG_SYS_ENV_SPI_MAX_HZ	CONFIG_SF_DEFAULT_SPEED
 #endif
 
+/*
+ * USB configuration
+ */
+#define CONFIG_USB_DA8XX	/* Platform hookup to MUSB controller */
+#define CONFIG_MUSB_HCD
 
 /*
  * U-Boot general configuration
@@ -234,10 +239,33 @@
 #endif
 
 #ifdef CONFIG_USB_DA8XX
-#define CONFIG_CMD_USB		/* include support for usb	*/
-#define CONFIG_CMD_STORAGE	/* include support for usb	*/
-#define CONFIG_CMD_FAT		/* include support for FAT/storage*/
-#define CONFIG_DOS_PARTITION	/* include support for FAT/storage*/
-#endif
 
+#ifdef CONFIG_MUSB_HCD		/* include support for usb host */
+#define CONFIG_CMD_USB		/* include support for usb cmd */
+
+#define CONFIG_USB_STORAGE	/* MSC class support */
+#define CONFIG_CMD_STORAGE	/* inclue support for usb-storage cmd */
+#define CONFIG_CMD_FAT		/* inclue support for FAT/storage */
+#define CONFIG_DOS_PARTITION	/* inclue support for FAT/storage */
+
+#ifdef CONFIG_USB_KEYBOARD	/* HID class support */
+#define CONFIG_SYS_USB_EVENT_POLL
+#define CONFIG_PREBOOT "usb start"
+#endif /* CONFIG_USB_KEYBOARD */
+
+#endif /* CONFIG_MUSB_HCD */
+
+#ifdef CONFIG_MUSB_UDC
+/* USB device configuration */
+#define CONFIG_USB_DEVICE		1
+#define CONFIG_USB_TTY			1
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
+/* Change these to suit your needs */
+#define CONFIG_USBD_VENDORID		0x0451
+#define CONFIG_USBD_PRODUCTID		0x5678
+#define CONFIG_USBD_MANUFACTURER	"Texas Instruments"
+#define CONFIG_USBD_PRODUCT_NAME	"DA830EVM"
+#endif /* CONFIG_MUSB_UDC */
+
+#endif /* CONFIG_USB_DA8XX */
 #endif /* __CONFIG_H */
diff --git a/include/configs/davinci_dm355evm.h b/include/configs/davinci_dm355evm.h
index d092fb832..37011c093 100644
--- a/include/configs/davinci_dm355evm.h
+++ b/include/configs/davinci_dm355evm.h
@@ -66,6 +66,7 @@
 
 /* NAND: socketed, two chipselects, normally 2 GBytes */
 #define CONFIG_NAND_DAVINCI
+#define CONFIG_SYS_NAND_CS		2
 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
 #define CONFIG_SYS_NAND_PAGE_2K
diff --git a/include/configs/davinci_dm355leopard.h b/include/configs/davinci_dm355leopard.h
index ca3dea48f..e09fb7518 100644
--- a/include/configs/davinci_dm355leopard.h
+++ b/include/configs/davinci_dm355leopard.h
@@ -65,6 +65,7 @@
 
 /* NAND */
 #define CONFIG_NAND_DAVINCI
+#define CONFIG_SYS_NAND_CS		2
 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_NAND_HW_ECC
 
diff --git a/include/configs/davinci_dm365evm.h b/include/configs/davinci_dm365evm.h
index 491607766..c6e1d107f 100644
--- a/include/configs/davinci_dm365evm.h
+++ b/include/configs/davinci_dm365evm.h
@@ -74,6 +74,7 @@
 
 /* NAND: socketed, two chipselects, normally 2 GBytes */
 #define CONFIG_NAND_DAVINCI
+#define CONFIG_SYS_NAND_CS		2
 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 #define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
 #define CONFIG_SYS_NAND_PAGE_2K
diff --git a/include/configs/davinci_dm6467evm.h b/include/configs/davinci_dm6467evm.h
index ce2d7c4dd..ddc5990ce 100644
--- a/include/configs/davinci_dm6467evm.h
+++ b/include/configs/davinci_dm6467evm.h
@@ -75,6 +75,7 @@
 #define CONFIG_SYS_NO_FLASH
 #ifdef CONFIG_SYS_USE_NAND
 #define CONFIG_NAND_DAVINCI
+#define CONFIG_SYS_NAND_CS		2
 #undef CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_SIZE			(16 << 10)	/* 16 KiB */
diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h
index f7d23990c..5774df5cf 100644
--- a/include/configs/davinci_dvevm.h
+++ b/include/configs/davinci_dvevm.h
@@ -114,6 +114,7 @@
 /*=====================*/
 #ifdef CONFIG_SYS_USE_NAND
 #define CONFIG_NAND_DAVINCI
+#define CONFIG_SYS_NAND_CS		2
 #undef CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_ENV_IS_IN_NAND		/* U-Boot env in NAND Flash  */
diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h
index 47db2aa9c..3972ebce6 100644
--- a/include/configs/davinci_schmoogie.h
+++ b/include/configs/davinci_schmoogie.h
@@ -83,6 +83,7 @@
 #undef CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_NAND_DAVINCI
+#define CONFIG_SYS_NAND_CS		2
 #define CONFIG_ENV_IS_IN_NAND		/* U-Boot env in NAND Flash  */
 #define CONFIG_ENV_SECT_SIZE	2048	/* Env sector Size */
 #define CONFIG_ENV_SIZE		(128 << 10)	/* 128 KiB */
diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h
index f24eb7a8b..94be9dcf4 100644
--- a/include/configs/davinci_sffsdr.h
+++ b/include/configs/davinci_sffsdr.h
@@ -78,6 +78,7 @@
 #undef CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_NAND_DAVINCI
+#define CONFIG_SYS_NAND_CS		2
 #define CONFIG_ENV_IS_IN_NAND		/* U-Boot env in NAND Flash  */
 #define CONFIG_ENV_SECT_SIZE	2048	/* Env sector Size */
 #define CONFIG_ENV_SIZE		(128 << 10)	/* 128 KiB */
diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h
index 5a55c569d..490821a0e 100644
--- a/include/configs/davinci_sonata.h
+++ b/include/configs/davinci_sonata.h
@@ -114,6 +114,7 @@
 /*=====================*/
 #ifdef CONFIG_SYS_USE_NAND
 #define CONFIG_NAND_DAVINCI
+#define CONFIG_SYS_NAND_CS		2
 #undef CONFIG_ENV_IS_IN_FLASH
 #define CONFIG_SYS_NO_FLASH
 #define CONFIG_ENV_IS_IN_NAND		/* U-Boot env in NAND Flash  */
diff --git a/include/configs/kmeter1.h b/include/configs/kmeter1.h
index bec08dab1..b02332650 100644
--- a/include/configs/kmeter1.h
+++ b/include/configs/kmeter1.h
@@ -72,6 +72,14 @@
 #define CONFIG_SYS_IMMR		0xE0000000
 
 /*
+ * Bus Arbitration Configuration Register (ACR)
+ */
+#define CONFIG_SYS_ACR_PIPE_DEP 3       /* pipeline depth 4 transactions */
+#define CONFIG_SYS_ACR_RPTCNT   3       /* 4 consecutive transactions */
+#define CONFIG_SYS_ACR_APARK    0       /* park bus to master (below) */
+#define CONFIG_SYS_ACR_PARKM    3       /* parking master = QuiccEngine */
+
+/*
  * DDR Setup
  */
 #define CONFIG_SYS_DDR_BASE		0x00000000 /* DDR is system memory */
diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h
index 6ab44387a..47437b09c 100644
--- a/include/configs/omap2420h4.h
+++ b/include/configs/omap2420h4.h
@@ -164,14 +164,12 @@
 /*
  * Miscellaneous configurable options
  */
+#define CONFIG_SYS_LONGHELP             /* undef to save memory */
 #ifdef CONFIG_APTIX
-#define V_PROMPT                 "OMAP2420 Aptix # "
+# define CONFIG_SYS_PROMPT		"OMAP2420 Aptix # "
 #else
-#define V_PROMPT                 "OMAP242x H4 # "
+# define CONFIG_SYS_PROMPT		"OMAP242x H4 # "
 #endif
-
-#define CONFIG_SYS_LONGHELP             /* undef to save memory */
-#define CONFIG_SYS_PROMPT               V_PROMPT
 #define CONFIG_SYS_CBSIZE               256  /* Console I/O Buffer Size */
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h
index 4fe3bd8be..a8abb0e14 100644
--- a/include/configs/omap3_beagle.h
+++ b/include/configs/omap3_beagle.h
@@ -230,12 +230,10 @@
 /*
  * Miscellaneous configurable options
  */
-#define V_PROMPT			"OMAP3 beagleboard.org # "
-
 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#define CONFIG_SYS_PROMPT		V_PROMPT
+#define CONFIG_SYS_PROMPT		"OMAP3 beagleboard.org # "
 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h
index 630b00fae..a8d4105fb 100644
--- a/include/configs/omap3_evm.h
+++ b/include/configs/omap3_evm.h
@@ -234,12 +234,10 @@
 /*
  * Miscellaneous configurable options
  */
-#define V_PROMPT		"OMAP3_EVM # "
-
 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#define CONFIG_SYS_PROMPT		V_PROMPT
+#define CONFIG_SYS_PROMPT		"OMAP3_EVM # "
 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h
index 0c12b9fea..c72fb9d8e 100644
--- a/include/configs/omap3_overo.h
+++ b/include/configs/omap3_overo.h
@@ -200,12 +200,10 @@
 /*
  * Miscellaneous configurable options
  */
-#define V_PROMPT		"Overo # "
-
 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#define CONFIG_SYS_PROMPT		V_PROMPT
+#define CONFIG_SYS_PROMPT		"Overo # "
 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h
index 154c0f4f3..f22fab579 100644
--- a/include/configs/omap3_pandora.h
+++ b/include/configs/omap3_pandora.h
@@ -191,12 +191,10 @@
 /*
  * Miscellaneous configurable options
  */
-#define V_PROMPT		"Pandora # "
-
 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#define CONFIG_SYS_PROMPT		V_PROMPT
+#define CONFIG_SYS_PROMPT		"Pandora # "
 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
diff --git a/include/configs/omap3_sdp3430.h b/include/configs/omap3_sdp3430.h
index fa2ad5343..4d0193388 100644
--- a/include/configs/omap3_sdp3430.h
+++ b/include/configs/omap3_sdp3430.h
@@ -267,12 +267,11 @@
 /*
  * Miscellaneous configurable options
  */
-#define V_PROMPT			"OMAP34XX SDP # "
 
 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#define CONFIG_SYS_PROMPT		V_PROMPT
+#define CONFIG_SYS_PROMPT		"OMAP34XX SDP # "
 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h
index fa5828159..cdf95c044 100644
--- a/include/configs/omap3_zoom1.h
+++ b/include/configs/omap3_zoom1.h
@@ -215,12 +215,10 @@
 /*
  * Miscellaneous configurable options
  */
-#define V_PROMPT			"OMAP3 Zoom1# "
-
 #define CONFIG_SYS_LONGHELP		/* undef to save memory */
 #define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
 #define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
-#define CONFIG_SYS_PROMPT		V_PROMPT
+#define CONFIG_SYS_PROMPT		"OMAP3 Zoom1 # "
 #define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
 /* Print Buffer Size */
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index 5788d581a..568d9fc0c 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -282,8 +282,20 @@
 
 /* USB */
 #ifdef CONFIG_440EPX
+
+#undef CONFIG_USB_EHCI	/* OHCI by default */
+
+#ifdef CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_PPC4XX
+#define CONFIG_SYS_PPC4XX_USB_ADDR	0xe0000300
+#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
+#define CONFIG_EHCI_MMIO_BIG_ENDIAN
+#define CONFIG_EHCI_DESC_BIG_ENDIAN
+#ifdef CONFIG_4xx_DCACHE
+#define CONFIG_EHCI_DCACHE
+#endif
+#else /* CONFIG_USB_EHCI */
 #define CONFIG_USB_OHCI_NEW
-#define CONFIG_USB_STORAGE
 #define CONFIG_SYS_OHCI_BE_CONTROLLER
 
 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
@@ -291,7 +303,9 @@
 #define CONFIG_SYS_USB_OHCI_REGS_BASE	CONFIG_SYS_USB_HOST
 #define CONFIG_SYS_USB_OHCI_SLOT_NAME	"ppc440"
 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
+#endif
 
+#define CONFIG_USB_STORAGE
 /* Comment this out to enable USB 1.1 device */
 #define USB_2_0_DEVICE
 
diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h
index f9db73b2d..dbc15b297 100644
--- a/include/configs/vme8349.h
+++ b/include/configs/vme8349.h
@@ -35,6 +35,13 @@
 #define __CONFIG_H
 
 /*
+ * Top level Makefile configuration choices
+ */
+#ifdef CONFIG_MK_caddy2
+#define VME_CADDY2
+#endif
+
+/*
  * High Level Configuration Options
  */
 #define CONFIG_E300		1	/* E300 Family */
@@ -43,6 +50,8 @@
 #define CONFIG_MPC8349		1	/* MPC8349 specific */
 #define CONFIG_VME8349		1	/* ESD VME8349 board specific */
 
+#define CONFIG_MISC_INIT_R
+
 #define CONFIG_PCI
 /* Don't enable PCI2 on vme834x - it doesn't exist physically. */
 #undef CONFIG_MPC83XX_PCI2		/* support for 2nd PCI controller */
@@ -75,7 +84,9 @@
  */
 #define CONFIG_DDR_ECC			/* only for ECC DDR module */
 #define CONFIG_DDR_ECC_CMD		/* use DDR ECC user commands */
-#undef CONFIG_SPD_EEPROM		/* dont use SPD EEPROM for DDR setup*/
+#define CONFIG_SPD_EEPROM
+#define SPD_EEPROM_ADDRESS		0x54
+#define CONFIG_SYS_READ_SPD		vme8349_read_spd
 #define CONFIG_SYS_83XX_DDR_USES_CS0	/* esd; Fsl board uses CS2/CS3 */
 
 /*
@@ -96,54 +107,40 @@
 #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL	(DDR_SDRAM_CLK_CNTL_SS_EN | \
 					 DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075)
 #define CONFIG_DDR_2T_TIMING
-
-/*
- * Manually set up DDR parameters
- */
-#define CONFIG_SYS_DDR_SIZE		512	/* MB */
-
-#if (CONFIG_SYS_DDR_SIZE == 512)
-#define CONFIG_SYS_DDR_CONFIG		(CSCONFIG_EN | CSCONFIG_ROW_BIT_13 | \
-					 CSCONFIG_COL_BIT_10 | \
-					 CSCONFIG_BANK_BIT_3)
-#endif
-
-/*
- * Manually set up DDR parameters
- */
-#define CONFIG_SYS_DDR_TIMING_0	        0x00220802
-#define CONFIG_SYS_DDR_TIMING_1	        0x39377322
-#define CONFIG_SYS_DDR_TIMING_2	        0x2f9848ca	/* P9-45, tuning? */
-#define CONFIG_SYS_DDR_TIMING_3	        0x00000000
-#define CONFIG_SYS_DDR_CONTROL		0xc2000000	/* unbuf,no DYN_PWR */
-#define CONFIG_SYS_DDR_MODE		0x07940242
-#define CONFIG_SYS_DDR_MODE2		0x00000000
-/* autocharge,no open page */
-#define CONFIG_SYS_DDR_INTERVAL	        0x04060100
-#define CONFIG_SYS_DDR_SDRAM_CFG	0x63000000
-#define CONFIG_SYS_DDR_SDRAM_CFG2	0x04061000
+#define CONFIG_SYS_DDRCDR		0x80080001
 
 /*
  * FLASH on the Local Bus
  */
 #define CONFIG_SYS_FLASH_CFI
 #define CONFIG_FLASH_CFI_DRIVER			        /* use the CFI driver */
-#define CONFIG_SYS_FLASH_BASE		0xf8000000	/* start of FLASH   */
-#define CONFIG_SYS_FLASH_SIZE           128		/* flash size in MB */
-/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
+#ifdef VME_CADDY2
+#define CONFIG_SYS_FLASH_BASE		0xffc00000	/* start of FLASH   */
+#define CONFIG_SYS_FLASH_SIZE		4		/* flash size in MB */
+#define CONFIG_SYS_BR0_PRELIM		(CONFIG_SYS_FLASH_BASE | \
+					 (2 << BR_PS_SHIFT) |	/*  32bit */ \
+					 BR_V)			/* valid */
 
+#define CONFIG_SYS_OR0_PRELIM		0xffc06ff7	/*   4 MB flash size */
+#define CONFIG_SYS_LBLAWBAR0_PRELIM	CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_LBLAWAR0_PRELIM	0x80000015	/*   4 MB window size */
+#else
+#define CONFIG_SYS_FLASH_BASE		0xf8000000	/* start of FLASH   */
+#define CONFIG_SYS_FLASH_SIZE		128		/* flash size in MB */
 #define CONFIG_SYS_BR0_PRELIM		(CONFIG_SYS_FLASH_BASE | \
 					 (2 << BR_PS_SHIFT) |	/*  32bit */ \
 					 BR_V)			/* valid */
 
-#define CONFIG_SYS_OR0_PRELIM		0xF8006FF7	/* 128 MB flash size */
+#define CONFIG_SYS_OR0_PRELIM		0xf8006ff7	/* 128 MB flash size */
 #define CONFIG_SYS_LBLAWBAR0_PRELIM	CONFIG_SYS_FLASH_BASE
-#define CONFIG_SYS_LBLAWAR0_PRELIM	0x8000001A	/* 128 MB window size */
+#define CONFIG_SYS_LBLAWAR0_PRELIM	0x8000001a	/* 128 MB window size */
+#endif
+/* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
 
 #define CONFIG_SYS_BR1_PRELIM		(0xf0000000 | 0x00001801)
-#define CONFIG_SYS_OR1_PRELIM		(0xffff8000 | 0x00000200)
+#define CONFIG_SYS_OR1_PRELIM		(0xfffc0008 | 0x00000200)
 #define CONFIG_SYS_LBLAWBAR1_PRELIM	0xf0000000
-#define CONFIG_SYS_LBLAWAR1_PRELIM	(0x80000000 | 0x0000000e)
+#define CONFIG_SYS_LBLAWAR1_PRELIM	(0x80000000 | 0x00000011)
 
 #define CONFIG_SYS_MAX_FLASH_BANKS	1	/* number of banks */
 #define CONFIG_SYS_MAX_FLASH_SECT	1024	/* sectors per device*/
@@ -157,7 +154,7 @@
 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
 #define CONFIG_SYS_RAMBOOT
 #else
-#undef  CONFIG_SYS_RAMBOOT
+#undef CONFIG_SYS_RAMBOOT
 #endif
 
 #define CONFIG_SYS_INIT_RAM_LOCK	1
@@ -174,11 +171,10 @@
 
 /*
  * Local Bus LCRR and LBCR regs
- *    LCRR:  DLL bypass, Clock divider is 4
+ *    LCRR:  no DLL bypass, Clock divider is 4
  * External Local Bus rate is
  *    CLKIN * HRCWL_CSB_TO_CLKIN / HRCWL_LCL_BUS_TO_SCB_CLK / LCRR_CLKDIV
  */
-#define CONFIG_SYS_LCRR_DBYP	LCRR_DBYP
 #define CONFIG_SYS_LCRR_CLKDIV	LCRR_CLKDIV_4
 #define CONFIG_SYS_LBC_LBCR	0x00000000
 
@@ -268,10 +264,10 @@
 #undef PCI_ONE_PCI1
 #endif
 
-#define CONFIG_PCI_PNP			/* do pci plug-and-play */
-#define CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup */
-
+#ifndef VME_CADDY2
 #define CONFIG_NET_MULTI
+#endif
+#define CONFIG_PCI_PNP		/* do pci plug-and-play */
 
 #undef CONFIG_EEPRO100
 #undef CONFIG_TULIP
@@ -282,19 +278,26 @@
 	#define PCI_IDSEL_NUMBER	0xFIXME
 #endif
 
+#define CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup */
+#define CONFIG_SYS_PCI_SUBSYS_VENDORID	0x1957	/* Freescale */
+
 #endif	/* CONFIG_PCI */
 
 /*
  * TSEC configuration
  */
+#ifdef VME_CADDY2
+#define CONFIG_E1000
+#else
 #define CONFIG_TSEC_ENET		/* TSEC ethernet support */
+#endif
 
 #if defined(CONFIG_TSEC_ENET)
 #ifndef CONFIG_NET_MULTI
 #define CONFIG_NET_MULTI
 #endif
 
-#define CONFIG_GMII		       /* MII PHY management */
+#define CONFIG_GMII			/* MII PHY management */
 #define CONFIG_TSEC1
 #define CONFIG_TSEC1_NAME	"TSEC0"
 #define CONFIG_TSEC2
@@ -312,6 +315,12 @@
 
 #endif	/* CONFIG_TSEC_ENET */
 
+#if defined(CONFIG_E1000)
+#ifndef CONFIG_NET_MULTI
+#define CONFIG_NET_MULTI
+#endif
+#endif
+
 /*
  * Environment
  */
@@ -560,7 +569,7 @@
 #define CONFIG_BOOTDELAY	6	/* -1 disables auto-boot */
 #undef  CONFIG_BOOTARGS			/* boot command will set bootargs */
 
-#define CONFIG_BAUDRATE	 115200
+#define CONFIG_BAUDRATE	 9600
 
 #define	CONFIG_EXTRA_ENV_SETTINGS					\
 	"netdev=eth0\0"							\
@@ -605,4 +614,9 @@
 
 #define CONFIG_BOOTCOMMAND	"run flash_self"
 
+#ifndef __ASSEMBLY__
+int vme8349_read_spd(unsigned char chip, unsigned int addr, int alen,
+		     unsigned char *buffer, int len);
+#endif
+
 #endif	/* __CONFIG_H */