summaryrefslogtreecommitdiff
path: root/include
diff options
context:
space:
mode:
authorRandy Vinson <rvinson@linuxbox.(none)>2007-02-27 19:42:22 -0700
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2007-08-14 01:51:39 -0500
commit7f3f2bd2dc08e0b05e185662ca2e2d283757104a (patch)
treeffa1b151a78d0f9c91787ac9973070fd5b2dcc5a /include
parente41094c7e38177c755fbd9b182018069614f080d (diff)
85xxCDS: Add make targets for legacy systems.
The PCI ID select values on the Arcadia main board differ depending on the version of the hardware. The standard configuration supports Rev 3.1. The legacy target supports Rev 2.x. Signed-off-by Randy Vinson <rvinson@mvista.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/MPC8541CDS.h7
-rw-r--r--include/configs/MPC8548CDS.h8
-rw-r--r--include/configs/MPC8555CDS.h7
3 files changed, 22 insertions, 0 deletions
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index 50d3b6b87..232f1716b 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -350,6 +350,13 @@ extern unsigned long get_clock_freq(void);
#define CFG_PCI2_IO_PHYS 0xe2100000
#define CFG_PCI2_IO_SIZE 0x100000 /* 1M */
+#ifdef CONFIG_LEGACY
+#define BRIDGE_ID 17
+#define VIA_ID 2
+#else
+#define BRIDGE_ID 28
+#define VIA_ID 4
+#endif
#if defined(CONFIG_PCI)
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index dfe4f5b7a..cda9fd5c1 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -395,6 +395,14 @@ extern unsigned long get_clock_freq(void);
#define CFG_RIO_MEM_SIZE 0x20000000 /* 512M */
#endif
+#ifdef CONFIG_LEGACY
+#define BRIDGE_ID 17
+#define VIA_ID 2
+#else
+#define BRIDGE_ID 28
+#define VIA_ID 4
+#endif
+
#if defined(CONFIG_PCI)
#define CONFIG_NET_MULTI
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index a3025bd71..e8fe99aaf 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -350,6 +350,13 @@ extern unsigned long get_clock_freq(void);
#define CFG_PCI2_IO_PHYS 0xe2100000
#define CFG_PCI2_IO_SIZE 0x00100000 /* 1M */
+#ifdef CONFIG_LEGACY
+#define BRIDGE_ID 17
+#define VIA_ID 2
+#else
+#define BRIDGE_ID 28
+#define VIA_ID 4
+#endif
#if defined(CONFIG_PCI)