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-rw-r--r--board/mpc8349emds/mpc8349emds.c24
-rw-r--r--board/mpc8349emds/pci.c22
-rw-r--r--board/mpc8349itx/mpc8349itx.c23
-rw-r--r--board/mpc8349itx/pci.c22
-rw-r--r--board/mpc8360emds/mpc8360emds.c23
-rw-r--r--board/mpc8360emds/pci.c19
-rw-r--r--include/configs/MPC8349EMDS.h51
-rw-r--r--include/configs/MPC8349ITX.h45
-rw-r--r--include/configs/MPC8360EMDS.h36
9 files changed, 245 insertions, 20 deletions
diff --git a/board/mpc8349emds/mpc8349emds.c b/board/mpc8349emds/mpc8349emds.c
index 6b3dedcbd..ed7b71d08 100644
--- a/board/mpc8349emds/mpc8349emds.c
+++ b/board/mpc8349emds/mpc8349emds.c
@@ -33,6 +33,10 @@
#if defined(CONFIG_SPD_EEPROM)
#include <spd_sdram.h>
#endif
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#endif
+
int fixed_sdram(void);
void sdram_init(void);
@@ -564,3 +568,23 @@ U_BOOT_CMD(
" - re-inits memory"
);
#endif /* if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) */
+
+#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
+void
+ft_board_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+#ifdef CONFIG_PCI
+ ft_pci_setup(blob, bd);
+#endif
+ ft_cpu_setup(blob, bd);
+
+ p = ft_get_prop(blob, "/memory/reg", &len);
+ if (p != NULL) {
+ *p++ = cpu_to_be32(bd->bi_memstart);
+ *p = cpu_to_be32(bd->bi_memsize);
+ }
+}
+#endif
diff --git a/board/mpc8349emds/pci.c b/board/mpc8349emds/pci.c
index 93827f11d..908be5754 100644
--- a/board/mpc8349emds/pci.c
+++ b/board/mpc8349emds/pci.c
@@ -385,4 +385,26 @@ pci_init_board(void)
}
+#ifdef CONFIG_OF_FLAT_TREE
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
+ if (p != NULL) {
+ p[0] = pci_hose[0].first_busno;
+ p[1] = pci_hose[0].last_busno;
+ }
+
+#ifdef CONFIG_MPC83XX_PCI2
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8600/bus-range", &len);
+ if (p != NULL) {
+ p[0] = pci_hose[1].first_busno;
+ p[1] = pci_hose[1].last_busno;
+ }
+#endif
+}
+#endif /* CONFIG_OF_FLAT_TREE */
#endif /* CONFIG_PCI */
diff --git a/board/mpc8349itx/mpc8349itx.c b/board/mpc8349itx/mpc8349itx.c
index 466264588..9fce973df 100644
--- a/board/mpc8349itx/mpc8349itx.c
+++ b/board/mpc8349itx/mpc8349itx.c
@@ -37,6 +37,9 @@
#else
#include <asm/mmu.h>
#endif
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#endif
#ifndef CONFIG_SPD_EEPROM
/*************************************************************************
@@ -459,3 +462,23 @@ int misc_init_r(void)
return rc;
}
+
+#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
+void
+ft_board_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+#ifdef CONFIG_PCI
+ ft_pci_setup(blob, bd);
+#endif
+ ft_cpu_setup(blob, bd);
+
+ p = ft_get_prop(blob, "/memory/reg", &len);
+ if (p != NULL) {
+ *p++ = cpu_to_be32(bd->bi_memstart);
+ *p = cpu_to_be32(bd->bi_memsize);
+ }
+}
+#endif
diff --git a/board/mpc8349itx/pci.c b/board/mpc8349itx/pci.c
index cf07020b6..b4637bc8c 100644
--- a/board/mpc8349itx/pci.c
+++ b/board/mpc8349itx/pci.c
@@ -330,3 +330,25 @@ void pci_init_board(void)
}
#endif /* CONFIG_PCI */
+#ifdef CONFIG_OF_FLAT_TREE
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
+ if (p != NULL) {
+ p[0] = pci_hose[0].first_busno;
+ p[1] = pci_hose[0].last_busno;
+ }
+
+#ifdef CONFIG_MPC83XX_PCI2
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8600/bus-range", &len);
+ if (p != NULL) {
+ p[0] = pci_hose[1].first_busno;
+ p[1] = pci_hose[1].last_busno;
+ }
+#endif
+}
+#endif /* CONFIG_OF_FLAT_TREE */
diff --git a/board/mpc8360emds/mpc8360emds.c b/board/mpc8360emds/mpc8360emds.c
index 5eadcd39e..5bbaa5cf2 100644
--- a/board/mpc8360emds/mpc8360emds.c
+++ b/board/mpc8360emds/mpc8360emds.c
@@ -28,6 +28,9 @@
#else
#include <asm/mmu.h>
#endif
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#endif
const qe_iop_conf_t qe_iop_conf_tab[] = {
/* GETH1 */
@@ -628,3 +631,23 @@ U_BOOT_CMD(ecc, 4, 0, do_ecc,
" - writes pattern with word access, generates error\n"
" - disables injects\n" " - re-inits memory");
#endif /* if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) */
+
+#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
+void
+ft_board_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+#ifdef CONFIG_PCI
+ ft_pci_setup(blob, bd);
+#endif
+ ft_cpu_setup(blob, bd);
+
+ p = ft_get_prop(blob, "/memory/reg", &len);
+ if (p != NULL) {
+ *p++ = cpu_to_be32(bd->bi_memstart);
+ *p = cpu_to_be32(bd->bi_memsize);
+ }
+}
+#endif
diff --git a/board/mpc8360emds/pci.c b/board/mpc8360emds/pci.c
index 64ea50979..c81e7a64e 100644
--- a/board/mpc8360emds/pci.c
+++ b/board/mpc8360emds/pci.c
@@ -234,6 +234,10 @@ void pci_init_board(void)
if(orig_i2c_bus != 2)
i2c_set_bus_num(orig_i2c_bus);
+ /* Reset to original I2C bus */
+ if(orig_i2c_bus != 2)
+ i2c_set_bus_num(orig_i2c_bus);
+
/*
* Release PCI RST Output signal
*/
@@ -298,4 +302,19 @@ void pci_init_board(void)
hose->last_busno = pci_hose_scan(hose);
}
#endif /* CONFIG_PCISLAVE */
+
+#ifdef CONFIG_OF_FLAT_TREE
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
+ if (p != NULL) {
+ p[0] = hose[0].first_busno;
+ p[1] = hose[0].last_busno;
+ }
+}
+#endif /* CONFIG_OF_FLAT_TREE */
#endif /* CONFIG_PCI */
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 4d5ad5719..e68c41acc 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -35,6 +35,7 @@
* High Level Configuration Options
*/
#define CONFIG_E300 1 /* E300 Family */
+#define CONFIG_MPC83XX 1 /* MPC83XX family */
#define CONFIG_MPC834X 1 /* MPC834X family */
#define CONFIG_MPC8349 1 /* MPC8349 specific */
#define CONFIG_MPC8349EMDS 1 /* MPC8349EMDS board specific */
@@ -59,6 +60,17 @@
#endif
#endif
+#define CFG_SCCR_INIT (SCCR_DEFAULT & (~SCCR_CLK_MASK))
+#define CFG_SCCR_TSEC1CM SCCR_TSEC1CM_1 /* TSEC1 clock setting */
+#define CFG_SCCR_TSEC2CM SCCR_TSEC2CM_1 /* TSEC2 clock setting */
+#define CFG_SCCR_ENCCM SCCR_ENCCM_3 /* ENC clock setting */
+#define CFG_SCCR_USBCM SCCR_USBCM_3 /* USB clock setting */
+#define CFG_SCCR_VAL ( CFG_SCCR_INIT \
+ | CFG_SCCR_TSEC1CM \
+ | CFG_SCCR_TSEC2CM \
+ | CFG_SCCR_ENCCM \
+ | CFG_SCCR_USBCM )
+
#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
#define CFG_IMMRBAR 0xE0000000
@@ -308,6 +320,18 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
+/* pass open firmware flat tree */
+#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_BOARD_SETUP 1
+
+/* maximum size of the flat tree (8K) */
+#define OF_FLAT_TREE_MAX_SIZE 8192
+
+#define OF_CPU "PowerPC,8349@0"
+#define OF_SOC "soc8349@e0000000"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH "/soc8349@e0000000/serial@4500"
+
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
@@ -668,11 +692,11 @@
#define CONFIG_ETH1ADDR 00:E0:0C:00:7E:21
#endif
-#define CONFIG_IPADDR 192.168.205.5
+#define CONFIG_IPADDR 192.168.1.253
#define CONFIG_HOSTNAME mpc8349emds
-#define CONFIG_ROOTPATH /opt/eldk/ppc_6xx
-#define CONFIG_BOOTFILE /tftpboot/tqm83xx/uImage
+#define CONFIG_ROOTPATH /nfsroot/rootfs
+#define CONFIG_BOOTFILE uImage
#define CONFIG_SERVERIP 192.168.1.1
#define CONFIG_GATEWAYIP 192.168.1.1
@@ -705,14 +729,31 @@
"bootm ${kernel_addr} ${ramdisk_addr}\0" \
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
"bootm\0" \
- "rootpath=/opt/eldk/ppc_6xx\0" \
- "bootfile=/tftpboot/mpc8349emds/uImage\0" \
"load=tftp 100000 /tftpboot/mpc8349emds/u-boot.bin\0" \
"update=protect off fe000000 fe03ffff; " \
"era fe000000 fe03ffff; cp.b 100000 fe000000 ${filesize}\0" \
"upd=run load;run update\0" \
+ "fdtaddr=400000\0" \
+ "fdtfile=mpc8349emds.dtb\0" \
""
+#define CONFIG_NFSBOOTCOMMAND \
+ "setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$serverip:$rootpath " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr - $fdtaddr"
+
+#define CONFIG_RAMBOOTCOMMAND \
+ "setenv bootargs root=/dev/ram rw " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $ramdiskaddr $ramdiskfile;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
+
#define CONFIG_BOOTCOMMAND "run flash_self"
#endif /* __CONFIG_H */
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 2fbc73618..aaf4d101d 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -383,6 +383,17 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
+/* pass open firmware flat tree */
+#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_BOARD_SETUP 1
+
+/* maximum size of the flat tree (8K) */
+#define OF_FLAT_TREE_MAX_SIZE 8192
+
+#define OF_CPU "PowerPC,8349@0"
+#define OF_SOC "soc8349@e0000000"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH "/soc8349@e0000000/serial@4500"
#ifdef CONFIG_PCI
@@ -697,17 +708,17 @@
#define CONFIG_ETH1ADDR 00:E0:0C:00:8C:02
#endif
-#define CONFIG_IPADDR 10.82.19.159
-#define CONFIG_SERVERIP 10.82.48.106
-#define CONFIG_GATEWAYIP 10.82.19.254
+#define CONFIG_IPADDR 192.168.1.253
+#define CONFIG_SERVERIP 192.168.1.1
+#define CONFIG_GATEWAYIP 192.168.1.1
#define CONFIG_NETMASK 255.255.252.0
#define CONFIG_NETDEV eth0
#define CONFIG_HOSTNAME mpc8349emitx
-#define CONFIG_ROOTPATH /nfsroot0/u/timur/itx-ltib/rootfs
-#define CONFIG_BOOTFILE timur/uImage
+#define CONFIG_ROOTPATH /nfsroot/rootfs
+#define CONFIG_BOOTFILE uImage
-#define CONFIG_UBOOTPATH timur/u-boot.bin
+#define CONFIG_UBOOTPATH u-boot.bin
#define CONFIG_UBOOTSTART fe700000
#define CONFIG_UBOOTEND fe77ffff
@@ -747,7 +758,27 @@
"cmp.b $loadaddr FEF00000 $filesize\0" \
"tftplinux=tftpboot $loadaddr $bootfile; bootm\0" \
"copyuboot=erase " MK_STR(CONFIG_UBOOTSTART) " " MK_STR(CONFIG_UBOOTEND) "; " \
- "cp.b fef00000 " MK_STR(CONFIG_UBOOTSTART) " 80000\0"
+ "cp.b fef00000 " MK_STR(CONFIG_UBOOTSTART) " 80000\0" \
+ "fdtaddr=400000\0" \
+ "fdtfile=mpc8349emitx.dtb\0" \
+ ""
+
+#define CONFIG_NFSBOOTCOMMAND \
+ "setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$serverip:$rootpath " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr - $fdtaddr"
+
+#define CONFIG_RAMBOOTCOMMAND \
+ "setenv bootargs root=/dev/ram rw " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $ramdiskaddr $ramdiskfile;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
#undef MK_STR
diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h
index 330c3073d..feb9cf22f 100644
--- a/include/configs/MPC8360EMDS.h
+++ b/include/configs/MPC8360EMDS.h
@@ -101,6 +101,8 @@
#define CFG_SDRAM_BASE CFG_DDR_BASE
#define CFG_DDR_SDRAM_BASE CFG_DDR_BASE
+#define CFG_83XX_DDR_USES_CS0
+
#undef CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_DDR_ECC_CMD /* Use DDR ECC user commands */
@@ -313,6 +315,18 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
+/* pass open firmware flat tree */
+#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_BOARD_SETUP 1
+
+/* maximum size of the flat tree (8K) */
+#define OF_FLAT_TREE_MAX_SIZE 8192
+
+#define OF_CPU "PowerPC,8360@0"
+#define OF_SOC "soc8360@e0000000"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH "/soc8360@e0000000/serial@4500"
+
/* I2C */
#define CONFIG_HARD_I2C /* I2C with hardware support */
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
@@ -591,23 +605,29 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
- "ramdiskaddr=400000\0" \
+ "ramdiskaddr=1000000\0" \
"ramdiskfile=ramfs.83xx\0" \
+ "fdtaddr=400000\0" \
+ "fdtfile=mpc8349emds.dtb\0" \
+ ""
#define CONFIG_NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
- "nfsroot=$serverip:$rootpath " \
- "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
- "console=$consoledev,$baudrate $othbootargs;" \
+ "nfsroot=$serverip:$rootpath " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
- "bootm $loadaddr"
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr - $fdtaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define CONFIG_RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
- "console=$consoledev,$baudrate $othbootargs;" \
+ "console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
- "bootm $loadaddr $ramdiskaddr"
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
+
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-23 10:26:46 +0000