diff options
| -rw-r--r-- | board/freescale/mpc8360erdk/nand.c | 2 | ||||
| -rw-r--r-- | drivers/mtd/nand/fsl_upm.c | 44 | ||||
| -rw-r--r-- | include/linux/mtd/fsl_upm.h | 4 |
3 files changed, 40 insertions, 10 deletions
diff --git a/board/freescale/mpc8360erdk/nand.c b/board/freescale/mpc8360erdk/nand.c index 8e22e138a..aa43350f2 100644 --- a/board/freescale/mpc8360erdk/nand.c +++ b/board/freescale/mpc8360erdk/nand.c @@ -57,7 +57,7 @@ static void upm_setup(struct fsl_upm *upm) eieio(); } -static int dev_ready(void) +static int dev_ready(int chip_nr) { if (in_be32(&im->qepio.ioport[4].pdat) & 0x00002000) { debug("nand ready\n"); diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c index 1a1d8c4e6..73abbbad1 100644 --- a/drivers/mtd/nand/fsl_upm.c +++ b/drivers/mtd/nand/fsl_upm.c @@ -31,26 +31,45 @@ static void fsl_upm_end_pattern(struct fsl_upm *upm) eieio(); } -static void fsl_upm_run_pattern(struct fsl_upm *upm, int width, u32 cmd) +static void fsl_upm_run_pattern(struct fsl_upm *upm, int width, + void __iomem *io_addr, u32 mar) { - out_be32(upm->mar, cmd << (32 - width)); + out_be32(upm->mar, mar); switch (width) { case 8: - out_8(upm->io_addr, 0x0); + out_8(io_addr, 0x0); break; case 16: - out_be16(upm->io_addr, 0x0); + out_be16(io_addr, 0x0); break; case 32: - out_be32(upm->io_addr, 0x0); + out_be32(io_addr, 0x0); break; } } +#if CONFIG_SYS_NAND_MAX_CHIPS > 1 +static void fun_select_chip(struct mtd_info *mtd, int chip_nr) +{ + struct nand_chip *chip = mtd->priv; + struct fsl_upm_nand *fun = chip->priv; + + if (chip_nr >= 0) { + fun->chip_nr = chip_nr; + chip->IO_ADDR_R = chip->IO_ADDR_W = + fun->upm.io_addr + fun->chip_offset * chip_nr; + } else if (chip_nr == -1) { + chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); + } +} +#endif + static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) { struct nand_chip *chip = mtd->priv; struct fsl_upm_nand *fun = chip->priv; + void __iomem *io_addr; + u32 mar; if (!(ctrl & fun->last_ctrl)) { fsl_upm_end_pattern(&fun->upm); @@ -68,7 +87,13 @@ static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset); } - fsl_upm_run_pattern(&fun->upm, fun->width, cmd); + mar = cmd << (32 - fun->width); + io_addr = fun->upm.io_addr; +#if CONFIG_SYS_NAND_MAX_CHIPS > 1 + if (fun->chip_nr > 0) + io_addr += fun->chip_offset * fun->chip_nr; +#endif + fsl_upm_run_pattern(&fun->upm, fun->width, io_addr, mar); /* * Some boards/chips needs this. At least on MPC8360E-RDK we @@ -77,7 +102,7 @@ static void fun_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) * 0-2 unexpected busy states per block read. */ if (fun->wait_pattern) { - while (!fun->dev_ready()) + while (!fun->dev_ready(fun->chip_nr)) debug("unexpected busy state\n"); } } @@ -125,7 +150,7 @@ static int nand_dev_ready(struct mtd_info *mtd) struct nand_chip *chip = mtd->priv; struct fsl_upm_nand *fun = chip->priv; - return fun->dev_ready(); + return fun->dev_ready(fun->chip_nr); } int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun) @@ -139,6 +164,9 @@ int fsl_upm_nand_init(struct nand_chip *chip, struct fsl_upm_nand *fun) chip->chip_delay = fun->chip_delay; chip->ecc.mode = NAND_ECC_SOFT; chip->cmd_ctrl = fun_cmd_ctrl; +#if CONFIG_SYS_NAND_MAX_CHIPS > 1 + chip->select_chip = fun_select_chip; +#endif chip->read_byte = nand_read_byte; chip->read_buf = nand_read_buf; chip->write_buf = nand_write_buf; diff --git a/include/linux/mtd/fsl_upm.h b/include/linux/mtd/fsl_upm.h index 638a4e468..ada11c1a0 100644 --- a/include/linux/mtd/fsl_upm.h +++ b/include/linux/mtd/fsl_upm.h @@ -29,8 +29,10 @@ struct fsl_upm_nand { int upm_cmd_offset; int upm_addr_offset; int wait_pattern; - int (*dev_ready)(void); + int (*dev_ready)(int chip_nr); int chip_delay; + int chip_offset; + int chip_nr; /* no need to fill */ int last_ctrl; |