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authorHomer Hsing <homer.xing@intel.com>2012-09-20 13:09:15 +0800
committerDamien Lespiau <damien.lespiau@intel.com>2013-03-04 15:54:33 +0000
commit741008e0503df0a0626d27da99a30aac0c880c29 (patch)
tree45b3b9d5c3cda161133ab6f4397142f6eaa883be
parent6983eebf47f37def8f2315d5af1800b81644f240 (diff)
Fix field length of JIP for one-offset-branch in Gen6
Such JIP has 25 bits length in Gen6.
-rw-r--r--assembler/src/brw_structs.h5
-rw-r--r--assembler/src/main.c6
2 files changed, 7 insertions, 4 deletions
diff --git a/assembler/src/brw_structs.h b/assembler/src/brw_structs.h
index 9a0c805c..b60f8b78 100644
--- a/assembler/src/brw_structs.h
+++ b/assembler/src/brw_structs.h
@@ -1311,7 +1311,10 @@ struct brw_instruction
{
GLint JIP:16; /* bspec: both the JIP and UIP are signed 16-bit numbers */
GLint UIP:16;
- } branch; /* for branch instructions: brc, brd, if, else, endif, while, break, cont, call, ret, halt, ... */
+ } branch_2_offset; /* for Gen6, Gen7 2-offsets branch instructions */
+
+ GLint JIP; /* for Gen6, Gen7 1-offset branch instructions
+ Gen6 uses low 25 bits. Gen7 uses low 16 bits. */
struct {
GLuint function:4;
diff --git a/assembler/src/main.c b/assembler/src/main.c
index edba5c33..f5341121 100644
--- a/assembler/src/main.c
+++ b/assembler/src/main.c
@@ -351,12 +351,12 @@ int main(int argc, char **argv)
entry1->inst_offset - entry->inst_offset;
int delta = (entry->instruction.header.opcode == BRW_OPCODE_JMPI ? 1 : 0);
if (gen_level >= 5)
- entry->instruction.bits3.branch.JIP = 2 * (offset - delta); // bspec: the jump distance in number of eight-byte units
+ entry->instruction.bits3.JIP = 2 * (offset - delta); // bspec: the jump distance in number of eight-byte units
else
- entry->instruction.bits3.branch.JIP = offset - delta;
+ entry->instruction.bits3.JIP = offset - delta;
if (entry->instruction.header.opcode == BRW_OPCODE_ELSE)
- entry->instruction.bits3.branch.UIP = 1;
+ entry->instruction.bits3.branch_2_offset.UIP = 1;
found = 1;
break;
}