tests/gem_media_fill: add support for gen7

v2: Fixed the source register used for the send with EOT
    Fixed the posted destination operand for the send with EOT

Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>

5 files changed, 685 insertions, 0 deletions

diff --git a/lib/Makefile.sources b/lib/Makefile.sources
index 95ccb2f6..fd08c1f5 100644
--- a/lib/Makefile.sources
+++ b/lib/Makefile.sources
@@ -21,7 +21,9 @@ libintel_tools_la_SOURCES = 	\
 	intel_reg.h		\
 	media_fill.c            \
 	media_fill.h            \
+	media_fill_gen7.c       \
 	media_fill_gen8.c       \
+	gen7_media.h            \
 	gen8_media.h            \
 	rendercopy_i915.c	\
 	rendercopy_i830.c	\
diff --git a/lib/gen7_media.h b/lib/gen7_media.h
new file mode 100644
index 00000000..d75ee1be
--- /dev/null
+++ b/lib/gen7_media.h
@@ -0,0 +1,323 @@
+#ifndef GEN7_MEDIA_H
+#define GEN7_MEDIA_H
+
+#define GEN7_SURFACEFORMAT_R32G32B32A32_FLOAT             0x000
+#define GEN7_SURFACEFORMAT_R32G32B32A32_SINT              0x001
+#define GEN7_SURFACEFORMAT_R32G32B32A32_UINT              0x002
+#define GEN7_SURFACEFORMAT_R32G32B32A32_UNORM             0x003
+#define GEN7_SURFACEFORMAT_R32G32B32A32_SNORM             0x004
+#define GEN7_SURFACEFORMAT_R64G64_FLOAT                   0x005
+#define GEN7_SURFACEFORMAT_R32G32B32X32_FLOAT             0x006
+#define GEN7_SURFACEFORMAT_R32G32B32A32_SSCALED           0x007
+#define GEN7_SURFACEFORMAT_R32G32B32A32_USCALED           0x008
+#define GEN7_SURFACEFORMAT_R32G32B32_FLOAT                0x040
+#define GEN7_SURFACEFORMAT_R32G32B32_SINT                 0x041
+#define GEN7_SURFACEFORMAT_R32G32B32_UINT                 0x042
+#define GEN7_SURFACEFORMAT_R32G32B32_UNORM                0x043
+#define GEN7_SURFACEFORMAT_R32G32B32_SNORM                0x044
+#define GEN7_SURFACEFORMAT_R32G32B32_SSCALED              0x045
+#define GEN7_SURFACEFORMAT_R32G32B32_USCALED              0x046
+#define GEN7_SURFACEFORMAT_R16G16B16A16_UNORM             0x080
+#define GEN7_SURFACEFORMAT_R16G16B16A16_SNORM             0x081
+#define GEN7_SURFACEFORMAT_R16G16B16A16_SINT              0x082
+#define GEN7_SURFACEFORMAT_R16G16B16A16_UINT              0x083
+#define GEN7_SURFACEFORMAT_R16G16B16A16_FLOAT             0x084
+#define GEN7_SURFACEFORMAT_R32G32_FLOAT                   0x085
+#define GEN7_SURFACEFORMAT_R32G32_SINT                    0x086
+#define GEN7_SURFACEFORMAT_R32G32_UINT                    0x087
+#define GEN7_SURFACEFORMAT_R32_FLOAT_X8X24_TYPELESS       0x088
+#define GEN7_SURFACEFORMAT_X32_TYPELESS_G8X24_UINT        0x089
+#define GEN7_SURFACEFORMAT_L32A32_FLOAT                   0x08A
+#define GEN7_SURFACEFORMAT_R32G32_UNORM                   0x08B
+#define GEN7_SURFACEFORMAT_R32G32_SNORM                   0x08C
+#define GEN7_SURFACEFORMAT_R64_FLOAT                      0x08D
+#define GEN7_SURFACEFORMAT_R16G16B16X16_UNORM             0x08E
+#define GEN7_SURFACEFORMAT_R16G16B16X16_FLOAT             0x08F
+#define GEN7_SURFACEFORMAT_A32X32_FLOAT                   0x090
+#define GEN7_SURFACEFORMAT_L32X32_FLOAT                   0x091
+#define GEN7_SURFACEFORMAT_I32X32_FLOAT                   0x092
+#define GEN7_SURFACEFORMAT_R16G16B16A16_SSCALED           0x093
+#define GEN7_SURFACEFORMAT_R16G16B16A16_USCALED           0x094
+#define GEN7_SURFACEFORMAT_R32G32_SSCALED                 0x095
+#define GEN7_SURFACEFORMAT_R32G32_USCALED                 0x096
+#define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM                 0x0C0
+#define GEN7_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB            0x0C1
+#define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM              0x0C2
+#define GEN7_SURFACEFORMAT_R10G10B10A2_UNORM_SRGB         0x0C3
+#define GEN7_SURFACEFORMAT_R10G10B10A2_UINT               0x0C4
+#define GEN7_SURFACEFORMAT_R10G10B10_SNORM_A2_UNORM       0x0C5
+#define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM                 0x0C7
+#define GEN7_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB            0x0C8
+#define GEN7_SURFACEFORMAT_R8G8B8A8_SNORM                 0x0C9
+#define GEN7_SURFACEFORMAT_R8G8B8A8_SINT                  0x0CA
+#define GEN7_SURFACEFORMAT_R8G8B8A8_UINT                  0x0CB
+#define GEN7_SURFACEFORMAT_R16G16_UNORM                   0x0CC
+#define GEN7_SURFACEFORMAT_R16G16_SNORM                   0x0CD
+#define GEN7_SURFACEFORMAT_R16G16_SINT                    0x0CE
+#define GEN7_SURFACEFORMAT_R16G16_UINT                    0x0CF
+#define GEN7_SURFACEFORMAT_R16G16_FLOAT                   0x0D0
+#define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM              0x0D1
+#define GEN7_SURFACEFORMAT_B10G10R10A2_UNORM_SRGB         0x0D2
+#define GEN7_SURFACEFORMAT_R11G11B10_FLOAT                0x0D3
+#define GEN7_SURFACEFORMAT_R32_SINT                       0x0D6
+#define GEN7_SURFACEFORMAT_R32_UINT                       0x0D7
+#define GEN7_SURFACEFORMAT_R32_FLOAT                      0x0D8
+#define GEN7_SURFACEFORMAT_R24_UNORM_X8_TYPELESS          0x0D9
+#define GEN7_SURFACEFORMAT_X24_TYPELESS_G8_UINT           0x0DA
+#define GEN7_SURFACEFORMAT_L16A16_UNORM                   0x0DF
+#define GEN7_SURFACEFORMAT_I24X8_UNORM                    0x0E0
+#define GEN7_SURFACEFORMAT_L24X8_UNORM                    0x0E1
+#define GEN7_SURFACEFORMAT_A24X8_UNORM                    0x0E2
+#define GEN7_SURFACEFORMAT_I32_FLOAT                      0x0E3
+#define GEN7_SURFACEFORMAT_L32_FLOAT                      0x0E4
+#define GEN7_SURFACEFORMAT_A32_FLOAT                      0x0E5
+#define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM                 0x0E9
+#define GEN7_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB            0x0EA
+#define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM                 0x0EB
+#define GEN7_SURFACEFORMAT_R8G8B8X8_UNORM_SRGB            0x0EC
+#define GEN7_SURFACEFORMAT_R9G9B9E5_SHAREDEXP             0x0ED
+#define GEN7_SURFACEFORMAT_B10G10R10X2_UNORM              0x0EE
+#define GEN7_SURFACEFORMAT_L16A16_FLOAT                   0x0F0
+#define GEN7_SURFACEFORMAT_R32_UNORM                      0x0F1
+#define GEN7_SURFACEFORMAT_R32_SNORM                      0x0F2
+#define GEN7_SURFACEFORMAT_R10G10B10X2_USCALED            0x0F3
+#define GEN7_SURFACEFORMAT_R8G8B8A8_SSCALED               0x0F4
+#define GEN7_SURFACEFORMAT_R8G8B8A8_USCALED               0x0F5
+#define GEN7_SURFACEFORMAT_R16G16_SSCALED                 0x0F6
+#define GEN7_SURFACEFORMAT_R16G16_USCALED                 0x0F7
+#define GEN7_SURFACEFORMAT_R32_SSCALED                    0x0F8
+#define GEN7_SURFACEFORMAT_R32_USCALED                    0x0F9
+#define GEN7_SURFACEFORMAT_B5G6R5_UNORM                   0x100
+#define GEN7_SURFACEFORMAT_B5G6R5_UNORM_SRGB              0x101
+#define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM                 0x102
+#define GEN7_SURFACEFORMAT_B5G5R5A1_UNORM_SRGB            0x103
+#define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM                 0x104
+#define GEN7_SURFACEFORMAT_B4G4R4A4_UNORM_SRGB            0x105
+#define GEN7_SURFACEFORMAT_R8G8_UNORM                     0x106
+#define GEN7_SURFACEFORMAT_R8G8_SNORM                     0x107
+#define GEN7_SURFACEFORMAT_R8G8_SINT                      0x108
+#define GEN7_SURFACEFORMAT_R8G8_UINT                      0x109
+#define GEN7_SURFACEFORMAT_R16_UNORM                      0x10A
+#define GEN7_SURFACEFORMAT_R16_SNORM                      0x10B
+#define GEN7_SURFACEFORMAT_R16_SINT                       0x10C
+#define GEN7_SURFACEFORMAT_R16_UINT                       0x10D
+#define GEN7_SURFACEFORMAT_R16_FLOAT                      0x10E
+#define GEN7_SURFACEFORMAT_I16_UNORM                      0x111
+#define GEN7_SURFACEFORMAT_L16_UNORM                      0x112
+#define GEN7_SURFACEFORMAT_A16_UNORM                      0x113
+#define GEN7_SURFACEFORMAT_L8A8_UNORM                     0x114
+#define GEN7_SURFACEFORMAT_I16_FLOAT                      0x115
+#define GEN7_SURFACEFORMAT_L16_FLOAT                      0x116
+#define GEN7_SURFACEFORMAT_A16_FLOAT                      0x117
+#define GEN7_SURFACEFORMAT_R5G5_SNORM_B6_UNORM            0x119
+#define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM                 0x11A
+#define GEN7_SURFACEFORMAT_B5G5R5X1_UNORM_SRGB            0x11B
+#define GEN7_SURFACEFORMAT_R8G8_SSCALED                   0x11C
+#define GEN7_SURFACEFORMAT_R8G8_USCALED                   0x11D
+#define GEN7_SURFACEFORMAT_R16_SSCALED                    0x11E
+#define GEN7_SURFACEFORMAT_R16_USCALED                    0x11F
+#define GEN7_SURFACEFORMAT_R8_UNORM                       0x140
+#define GEN7_SURFACEFORMAT_R8_SNORM                       0x141
+#define GEN7_SURFACEFORMAT_R8_SINT                        0x142
+#define GEN7_SURFACEFORMAT_R8_UINT                        0x143
+#define GEN7_SURFACEFORMAT_A8_UNORM                       0x144
+#define GEN7_SURFACEFORMAT_I8_UNORM                       0x145
+#define GEN7_SURFACEFORMAT_L8_UNORM                       0x146
+#define GEN7_SURFACEFORMAT_P4A4_UNORM                     0x147
+#define GEN7_SURFACEFORMAT_A4P4_UNORM                     0x148
+#define GEN7_SURFACEFORMAT_R8_SSCALED                     0x149
+#define GEN7_SURFACEFORMAT_R8_USCALED                     0x14A
+#define GEN7_SURFACEFORMAT_R1_UINT                        0x181
+#define GEN7_SURFACEFORMAT_YCRCB_NORMAL                   0x182
+#define GEN7_SURFACEFORMAT_YCRCB_SWAPUVY                  0x183
+#define GEN7_SURFACEFORMAT_BC1_UNORM                      0x186
+#define GEN7_SURFACEFORMAT_BC2_UNORM                      0x187
+#define GEN7_SURFACEFORMAT_BC3_UNORM                      0x188
+#define GEN7_SURFACEFORMAT_BC4_UNORM                      0x189
+#define GEN7_SURFACEFORMAT_BC5_UNORM                      0x18A
+#define GEN7_SURFACEFORMAT_BC1_UNORM_SRGB                 0x18B
+#define GEN7_SURFACEFORMAT_BC2_UNORM_SRGB                 0x18C
+#define GEN7_SURFACEFORMAT_BC3_UNORM_SRGB                 0x18D
+#define GEN7_SURFACEFORMAT_MONO8                          0x18E
+#define GEN7_SURFACEFORMAT_YCRCB_SWAPUV                   0x18F
+#define GEN7_SURFACEFORMAT_YCRCB_SWAPY                    0x190
+#define GEN7_SURFACEFORMAT_DXT1_RGB                       0x191
+#define GEN7_SURFACEFORMAT_FXT1                           0x192
+#define GEN7_SURFACEFORMAT_R8G8B8_UNORM                   0x193
+#define GEN7_SURFACEFORMAT_R8G8B8_SNORM                   0x194
+#define GEN7_SURFACEFORMAT_R8G8B8_SSCALED                 0x195
+#define GEN7_SURFACEFORMAT_R8G8B8_USCALED                 0x196
+#define GEN7_SURFACEFORMAT_R64G64B64A64_FLOAT             0x197
+#define GEN7_SURFACEFORMAT_R64G64B64_FLOAT                0x198
+#define GEN7_SURFACEFORMAT_BC4_SNORM                      0x199
+#define GEN7_SURFACEFORMAT_BC5_SNORM                      0x19A
+#define GEN7_SURFACEFORMAT_R16G16B16_UNORM                0x19C
+#define GEN7_SURFACEFORMAT_R16G16B16_SNORM                0x19D
+#define GEN7_SURFACEFORMAT_R16G16B16_SSCALED              0x19E
+#define GEN7_SURFACEFORMAT_R16G16B16_USCALED              0x19F
+
+#define GEN7_SURFACERETURNFORMAT_FLOAT32  	0
+#define GEN7_SURFACERETURNFORMAT_S1       	1
+
+#define GEN7_SURFACE_1D				0
+#define GEN7_SURFACE_2D				1
+#define GEN7_SURFACE_3D				2
+#define GEN7_SURFACE_CUBE			3
+#define GEN7_SURFACE_BUFFER			4
+#define GEN7_SURFACE_NULL			7
+
+#define GEN7_FLOATING_POINT_IEEE_754		0
+#define GEN7_FLOATING_POINT_NON_IEEE_754	1
+
+#define GFXPIPE(Pipeline,Opcode,Subopcode) ((3 << 29) |			\
+						((Pipeline) << 27) |	\
+						((Opcode) << 24) |	\
+						((Subopcode) << 16))
+
+#define GEN7_PIPELINE_SELECT			GFXPIPE(1, 1, 4)
+# define PIPELINE_SELECT_3D			(0 << 0)
+# define PIPELINE_SELECT_MEDIA			(1 << 0)
+
+#define GEN7_STATE_BASE_ADDRESS			GFXPIPE(0, 1, 1)
+# define BASE_ADDRESS_MODIFY			(1 << 0)
+
+#define GEN7_MEDIA_VFE_STATE			GFXPIPE(2, 0, 0)
+#define GEN7_MEDIA_CURBE_LOAD			GFXPIPE(2, 0, 1)
+#define GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD	GFXPIPE(2, 0, 2)
+#define GEN7_MEDIA_OBJECT			GFXPIPE(2, 1, 0)
+
+struct gen7_interface_descriptor_data
+{
+	struct {
+		uint32_t pad0:6;
+		uint32_t kernel_start_pointer:26;
+	} desc0;
+
+	struct {
+		uint32_t pad0:7;
+		uint32_t software_exception_enable:1;
+		uint32_t pad1:3;
+		uint32_t maskstack_exception_enable:1;
+		uint32_t pad2:1;
+		uint32_t illegal_opcode_exception_enable:1;
+		uint32_t pad3:2;
+		uint32_t floating_point_mode:1;
+		uint32_t thread_priority:1;
+		uint32_t single_program_flow:1;
+		uint32_t pad4:13;
+	} desc1;
+
+	struct {
+		uint32_t pad0:2;
+		uint32_t sampler_count:3;
+		uint32_t sampler_state_pointer:27;
+	} desc2;
+
+	struct {
+		uint32_t binding_table_entry_count:5;
+		uint32_t binding_table_pointer:27;
+	} desc3;
+
+	struct {
+		uint32_t constant_urb_entry_read_offset:16;
+		uint32_t constant_urb_entry_read_length:16;
+	} desc4;
+
+	struct {
+		uint32_t num_threads:8;
+		uint32_t barrier_return_byte:8;
+		uint32_t shared_local_memory_size:5;
+		uint32_t barrier_enable:1;
+		uint32_t rounding_mode:2;
+		uint32_t barrier_return_grf_offset:8;
+	} desc5;
+
+	struct {
+		uint32_t cross_thread_constant_data_read_length:8;
+		uint32_t pad0:24;
+	} desc6;
+
+	struct {
+		uint32_t pad0;
+	} desc7;
+};
+
+struct gen7_surface_state
+{
+    struct {
+        uint32_t cube_pos_z:1;
+        uint32_t cube_neg_z:1;
+        uint32_t cube_pos_y:1;
+        uint32_t cube_neg_y:1;
+        uint32_t cube_pos_x:1;
+        uint32_t cube_neg_x:1;
+        uint32_t pad2:2;
+        uint32_t render_cache_read_write:1;
+        uint32_t pad1:1;
+        uint32_t surface_array_spacing:1;
+        uint32_t vert_line_stride_ofs:1;
+        uint32_t vert_line_stride:1;
+        uint32_t tiled_mode:2;
+        uint32_t horizontal_alignment:1;
+        uint32_t vertical_alignment:2;
+        uint32_t surface_format:9;     /**< BRW_SURFACEFORMAT_x */
+        uint32_t pad0:1;
+        uint32_t is_array:1;
+        uint32_t surface_type:3;       /**< BRW_SURFACE_1D/2D/3D/CUBE */
+    } ss0;
+
+    struct {
+        uint32_t base_addr;
+    } ss1;
+
+    struct {
+        uint32_t width:14;
+        uint32_t pad1:2;
+        uint32_t height:14;
+        uint32_t pad0:2;
+    } ss2;
+
+    struct {
+        uint32_t pitch:18;
+        uint32_t pad:3;
+        uint32_t depth:11;
+    } ss3;
+
+    struct {
+        uint32_t multisample_position_palette_index:3;
+        uint32_t num_multisamples:3;
+        uint32_t multisampled_surface_storage_format:1;
+        uint32_t render_target_view_extent:11;
+        uint32_t min_array_elt:11;
+        uint32_t rotation:2;
+        uint32_t pad0:1;
+    } ss4;
+
+    struct {
+        uint32_t mip_count:4;
+        uint32_t min_lod:4;
+        uint32_t pad1:12;
+        uint32_t y_offset:4;
+        uint32_t pad0:1;
+        uint32_t x_offset:7;
+    } ss5;
+
+    struct {
+        uint32_t pad; /* Multisample Control Surface stuff */
+    } ss6;
+
+    struct {
+        uint32_t resource_min_lod:12;
+        uint32_t pad0:4;
+        uint32_t shader_chanel_select_a:3;
+        uint32_t shader_chanel_select_b:3;
+        uint32_t shader_chanel_select_g:3;
+        uint32_t shader_chanel_select_r:3;
+        uint32_t alpha_clear_color:1;
+        uint32_t blue_clear_color:1;
+        uint32_t green_clear_color:1;
+        uint32_t red_clear_color:1;
+    } ss7;
+};
+
+#endif /* GEN7_MEDIA_H */
diff --git a/lib/media_fill.c b/lib/media_fill.c
index b893451d..084237f7 100644
--- a/lib/media_fill.c
+++ b/lib/media_fill.c
@@ -7,6 +7,8 @@ media_fillfunc_t get_media_fillfunc(int devid)
 
 	if (IS_GEN8(devid))
 		fill = gen8_media_fillfunc;
+	else if (IS_GEN7(devid))
+		fill = gen7_media_fillfunc;
 
 	return fill;
 }
diff --git a/lib/media_fill.h b/lib/media_fill.h
index 5edd7b3c..719eb54a 100644
--- a/lib/media_fill.h
+++ b/lib/media_fill.h
@@ -54,4 +54,11 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch,
 		unsigned width, unsigned height,
 		uint8_t color);
 
+void
+gen7_media_fillfunc(struct intel_batchbuffer *batch,
+                struct scratch_buf *dst,
+                unsigned x, unsigned y,
+                unsigned width, unsigned height,
+                uint8_t color);
+
 #endif /* RENDE_MEDIA_FILL_H */
diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c
new file mode 100644
index 00000000..8f43de7a
--- /dev/null
+++ b/lib/media_fill_gen7.c
@@ -0,0 +1,351 @@
+#include "media_fill.h"
+#include "gen7_media.h"
+
+#include <assert.h>
+
+#define ALIGN(x, y) (((x) + (y)-1) & ~((y)-1))
+
+static const uint32_t media_kernel[][4] = {
+	{ 0x00400001, 0x20200231, 0x00000020, 0x00000000 },
+	{ 0x00600001, 0x20800021, 0x008d0000, 0x00000000 },
+	{ 0x00200001, 0x20800021, 0x00450040, 0x00000000 },
+	{ 0x00000001, 0x20880061, 0x00000000, 0x000f000f },
+	{ 0x00800001, 0x20a00021, 0x00000020, 0x00000000 },
+	{ 0x00800001, 0x20e00021, 0x00000020, 0x00000000 },
+	{ 0x00800001, 0x21200021, 0x00000020, 0x00000000 },
+	{ 0x00800001, 0x21600021, 0x00000020, 0x00000000 },
+	{ 0x05800031, 0x24001ca8, 0x00000080, 0x120a8000 },
+	{ 0x00600001, 0x2e000021, 0x008d0000, 0x00000000 },
+	{ 0x07800031, 0x20001ca8, 0x00000e00, 0x82000010 },
+};
+
+static uint32_t
+batch_used(struct intel_batchbuffer *batch)
+{
+	return batch->ptr - batch->buffer;
+}
+
+static uint32_t
+batch_align(struct intel_batchbuffer *batch, uint32_t align)
+{
+	uint32_t offset = batch_used(batch);
+	offset = ALIGN(offset, align);
+	batch->ptr = batch->buffer + offset;
+	return offset;
+}
+
+static void *
+batch_alloc(struct intel_batchbuffer *batch, uint32_t size, uint32_t align)
+{
+	uint32_t offset = batch_align(batch, align);
+	batch->ptr += size;
+	return memset(batch->buffer + offset, 0, size);
+}
+
+static uint32_t
+batch_offset(struct intel_batchbuffer *batch, void *ptr)
+{
+	return (uint8_t *)ptr - batch->buffer;
+}
+
+static uint32_t
+batch_copy(struct intel_batchbuffer *batch, const void *ptr, uint32_t size, uint32_t align)
+{
+	return batch_offset(batch, memcpy(batch_alloc(batch, size, align), ptr, size));
+}
+
+static void
+gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end)
+{
+	int ret;
+
+	ret = drm_intel_bo_subdata(batch->bo, 0, 4096, batch->buffer);
+	if (ret == 0)
+		ret = drm_intel_bo_mrb_exec(batch->bo, batch_end,
+					NULL, 0, 0, 0);
+	assert(ret == 0);
+}
+
+static uint32_t
+gen7_fill_curbe_buffer_data(struct intel_batchbuffer *batch,
+			uint8_t color)
+{
+	uint8_t *curbe_buffer;
+	uint32_t offset;
+
+	curbe_buffer = batch_alloc(batch, sizeof(uint32_t) * 8, 64);
+	offset = batch_offset(batch, curbe_buffer);
+	*curbe_buffer = color;
+
+	return offset;
+}
+
+static uint32_t
+gen7_fill_surface_state(struct intel_batchbuffer *batch,
+			struct scratch_buf *buf,
+			uint32_t format,
+			int is_dst)
+{
+	struct gen7_surface_state *ss;
+	uint32_t write_domain, read_domain, offset;
+	int ret;
+
+	if (is_dst) {
+		write_domain = read_domain = I915_GEM_DOMAIN_RENDER;
+	} else {
+		write_domain = 0;
+		read_domain = I915_GEM_DOMAIN_SAMPLER;
+	}
+
+	ss = batch_alloc(batch, sizeof(*ss), 64);
+	offset = batch_offset(batch, ss);
+
+	ss->ss0.surface_type = GEN7_SURFACE_2D;
+	ss->ss0.surface_format = format;
+	ss->ss0.render_cache_read_write = 1;
+
+	if (buf->tiling == I915_TILING_X)
+		ss->ss0.tiled_mode = 2;
+	else if (buf->tiling == I915_TILING_Y)
+		ss->ss0.tiled_mode = 3;
+
+	ss->ss1.base_addr = buf->bo->offset;
+	ret = drm_intel_bo_emit_reloc(batch->bo,
+				batch_offset(batch, ss) + 4,
+				buf->bo, 0,
+				read_domain, write_domain);
+	assert(ret == 0);
+
+	ss->ss2.height = buf_height(buf) - 1;
+	ss->ss2.width  = buf_width(buf) - 1;
+
+	ss->ss3.pitch  = buf->stride - 1;
+
+	ss->ss7.shader_chanel_select_r = 4;
+	ss->ss7.shader_chanel_select_g = 5;
+	ss->ss7.shader_chanel_select_b = 6;
+	ss->ss7.shader_chanel_select_a = 7;
+
+	return offset;
+}
+
+static uint32_t
+gen7_fill_binding_table(struct intel_batchbuffer *batch,
+			struct scratch_buf *dst)
+{
+	uint32_t *binding_table, offset;
+
+	binding_table = batch_alloc(batch, 32, 64);
+	offset = batch_offset(batch, binding_table);
+
+	binding_table[0] = gen7_fill_surface_state(batch, dst, GEN7_SURFACEFORMAT_R8_UNORM, 1);
+
+	return offset;
+}
+
+static uint32_t
+gen7_fill_media_kernel(struct intel_batchbuffer *batch,
+		const uint32_t kernel[][4],
+		size_t size)
+{
+	uint32_t offset;
+
+	offset = batch_copy(batch, kernel, size, 64);
+
+	return offset;
+}
+
+static uint32_t
+gen7_fill_interface_descriptor(struct intel_batchbuffer *batch, struct scratch_buf *dst)
+{
+	struct gen7_interface_descriptor_data *idd;
+	uint32_t offset;
+	uint32_t binding_table_offset, kernel_offset;
+
+	binding_table_offset = gen7_fill_binding_table(batch, dst);
+	kernel_offset = gen7_fill_media_kernel(batch, media_kernel, sizeof(media_kernel));
+
+	idd = batch_alloc(batch, sizeof(*idd), 64);
+	offset = batch_offset(batch, idd);
+
+	idd->desc0.kernel_start_pointer = (kernel_offset >> 6);
+
+	idd->desc1.single_program_flow = 1;
+	idd->desc1.floating_point_mode = GEN7_FLOATING_POINT_IEEE_754;
+
+	idd->desc2.sampler_count = 0;      /* 0 samplers used */
+	idd->desc2.sampler_state_pointer = 0;
+
+	idd->desc3.binding_table_entry_count = 0;
+	idd->desc3.binding_table_pointer = (binding_table_offset >> 5);
+
+	idd->desc4.constant_urb_entry_read_offset = 0;
+	idd->desc4.constant_urb_entry_read_length = 1; /* grf 1 */
+
+	return offset;
+}
+
+static void
+gen7_emit_state_base_address(struct intel_batchbuffer *batch)
+{
+	OUT_BATCH(GEN7_STATE_BASE_ADDRESS | (10 - 2));
+
+	/* general */
+	OUT_BATCH(0);
+
+	/* surface */
+	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+
+	/* dynamic */
+	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+
+	/* indirect */
+	OUT_BATCH(0);
+
+	/* instruction */
+	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
+
+	/* general/dynamic/indirect/instruction access Bound */
+	OUT_BATCH(0);
+	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+	OUT_BATCH(0);
+	OUT_BATCH(0 | BASE_ADDRESS_MODIFY);
+}
+
+static void
+gen7_emit_vfe_state(struct intel_batchbuffer *batch)
+{
+	OUT_BATCH(GEN7_MEDIA_VFE_STATE | (8 - 2));
+
+	/* scratch buffer */
+	OUT_BATCH(0);
+
+	/* number of threads & urb entries */
+	OUT_BATCH(1 << 16 |
+		2 << 8);
+
+	OUT_BATCH(0);
+
+	/* urb entry size & curbe size */
+	OUT_BATCH(2 << 16 | 	/* in 256 bits unit */
+		2);		/* in 256 bits unit */
+
+	/* scoreboard */
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+}
+
+static void
+gen7_emit_curbe_load(struct intel_batchbuffer *batch, uint32_t curbe_buffer)
+{
+	OUT_BATCH(GEN7_MEDIA_CURBE_LOAD | (4 - 2));
+	OUT_BATCH(0);
+	/* curbe total data length */
+	OUT_BATCH(64);
+	/* curbe data start address, is relative to the dynamics base address */
+	OUT_BATCH(curbe_buffer);
+}
+
+static void
+gen7_emit_interface_descriptor_load(struct intel_batchbuffer *batch, uint32_t interface_descriptor)
+{
+	OUT_BATCH(GEN7_MEDIA_INTERFACE_DESCRIPTOR_LOAD | (4 - 2));
+	OUT_BATCH(0);
+	/* interface descriptor data length */
+	OUT_BATCH(sizeof(struct gen7_interface_descriptor_data));
+	/* interface descriptor address, is relative to the dynamics base address */
+	OUT_BATCH(interface_descriptor);
+}
+
+static void
+gen7_emit_media_objects(struct intel_batchbuffer *batch,
+			unsigned x, unsigned y,
+			unsigned width, unsigned height)
+{
+	int i, j;
+
+	for (i = 0; i < width / 16; i++) {
+		for (j = 0; j < height / 16; j++) {
+			OUT_BATCH(GEN7_MEDIA_OBJECT | (8 - 2));
+
+			/* interface descriptor offset */
+			OUT_BATCH(0);
+
+			/* without indirect data */
+			OUT_BATCH(0);
+			OUT_BATCH(0);
+
+			/* scoreboard */
+			OUT_BATCH(0);
+			OUT_BATCH(0);
+
+			/* inline data (xoffset, yoffset) */
+			OUT_BATCH(x + i * 16);
+			OUT_BATCH(y + j * 16);
+		}
+	}
+}
+
+/*
+ * This sets up the media pipeline,
+ *
+ * +---------------+ <---- 4096
+ * |       ^       |
+ * |       |       |
+ * |    various    |
+ * |      state    |
+ * |       |       |
+ * |_______|_______| <---- 2048 + ?
+ * |       ^       |
+ * |       |       |
+ * |   batch       |
+ * |    commands   |
+ * |       |       |
+ * |       |       |
+ * +---------------+ <---- 0 + ?
+ *
+ */
+
+#define BATCH_STATE_SPLIT 2048
+
+void
+gen7_media_fillfunc(struct intel_batchbuffer *batch,
+		struct scratch_buf *dst,
+		unsigned x, unsigned y,
+		unsigned width, unsigned height,
+		uint8_t color)
+{
+	uint32_t curbe_buffer, interface_descriptor;
+	uint32_t batch_end;
+
+	intel_batchbuffer_flush(batch);
+
+	/* setup states */
+	batch->ptr = &batch->buffer[BATCH_STATE_SPLIT];
+
+	curbe_buffer = gen7_fill_curbe_buffer_data(batch, color);
+	interface_descriptor = gen7_fill_interface_descriptor(batch, dst);
+	assert(batch->ptr < &batch->buffer[4095]);
+
+	/* media pipeline */
+	batch->ptr = batch->buffer;
+	OUT_BATCH(GEN7_PIPELINE_SELECT | PIPELINE_SELECT_MEDIA);
+	gen7_emit_state_base_address(batch);
+
+	gen7_emit_vfe_state(batch);
+
+	gen7_emit_curbe_load(batch, curbe_buffer);
+
+	gen7_emit_interface_descriptor_load(batch, interface_descriptor);
+
+	gen7_emit_media_objects(batch, x, y, width, height);
+
+	OUT_BATCH(MI_BATCH_BUFFER_END);
+
+	batch_end = batch_align(batch, 8);
+	assert(batch_end < BATCH_STATE_SPLIT);
+
+	gen7_render_flush(batch, batch_end);
+	intel_batchbuffer_reset(batch);
+}