diff options
author | Damien Lespiau <damien.lespiau@intel.com> | 2013-01-16 01:19:29 +0000 |
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committer | Damien Lespiau <damien.lespiau@intel.com> | 2013-03-04 15:54:36 +0000 |
commit | cb425d6d203c9e36d20aaf4c975aecb3ca10b598 (patch) | |
tree | 766bad59346c75a22a4f3f7bad8424fda63fce45 /assembler | |
parent | 0fde3ddccc4f2f1dcf9f81c2038ce18ef1a62a29 (diff) |
assembler: Rename branch to branch_gen6
The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Diffstat (limited to 'assembler')
-rw-r--r-- | assembler/brw_structs.h | 17 | ||||
-rw-r--r-- | assembler/main.c | 2 |
2 files changed, 13 insertions, 6 deletions
diff --git a/assembler/brw_structs.h b/assembler/brw_structs.h index 511c3266..7b0b0da5 100644 --- a/assembler/brw_structs.h +++ b/assembler/brw_structs.h @@ -1125,6 +1125,18 @@ struct brw_instruction GLuint dest_address_mode:1; } ia16; /* indirect align16 */ + struct { + GLuint dest_reg_file:2; + GLuint dest_reg_type:3; + GLuint src0_reg_file:2; + GLuint src0_reg_type:3; + GLuint src1_reg_file:2; + GLuint src1_reg_type:3; + GLuint pad:1; + + GLint jump_count:16; + } branch_gen6; + struct { GLuint dest_reg_file:1; /* used in Gen6, deleted in Gen7 */ @@ -1144,11 +1156,6 @@ struct brw_instruction GLuint dest_reg_nr:8; } da3src; - struct - { - GLuint pad:16; - GLint JIP:16; - } branch; /* conditional branch JIP for Gen6 only */ } bits1; diff --git a/assembler/main.c b/assembler/main.c index 15ed5179..ae271b42 100644 --- a/assembler/main.c +++ b/assembler/main.c @@ -448,7 +448,7 @@ int main(int argc, char **argv) if(opcode == BRW_OPCODE_CALL || opcode == BRW_OPCODE_JMPI) entry->instruction.bits3.JIP = offset; // for CALL, JMPI else - entry->instruction.bits1.branch.JIP = offset; // for CASE,ELSE,FORK,IF,WHILE + entry->instruction.bits1.branch_gen6.jump_count = offset; // for CASE,ELSE,FORK,IF,WHILE } else if(IS_GENp(7)) { int opcode = entry->instruction.header.opcode; /* Gen7 JMPI Restrictions in bspec: |