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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2018-05-14 11:46:46 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2018-05-24 10:49:47 +0100 |
| commit | 941b32ebbcae1bd910b9874e3f6eda867f050589 (patch) | |
| tree | b2b437f2293f89da68dca4b5fb85081eed2d6d3e /benchmarks/gem_exec_tracer.c | |
| parent | 8a26e0e9d99c7f1231250471d11f7decb0ad3d99 (diff) | |
benchmarks/gem_syslatency: Pass a write hazard around
Extend the i915 load to (optionally) pass a write hazard between
engines, causing us to wait on the interrupt between engines. Thus
adding MI_USER_INTERRUPT irq handling to our list of sins.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Diffstat (limited to 'benchmarks/gem_exec_tracer.c')
0 files changed, 0 insertions, 0 deletions