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authorTvrtko Ursulin <tvrtko.ursulin@intel.com>2017-06-07 10:01:25 +0100
committerTvrtko Ursulin <tvrtko.ursulin@intel.com>2017-06-08 09:03:06 +0100
commit5a5be91d76879ddfc84a1a18f85a7e0099ee84ba (patch)
tree5502cad256ced0db9bcd8a792e6ae607425e62d9 /benchmarks/wsim/vcs1.wsim
parent65173e1aaa909ddef37321170dfb33a2992ba6f4 (diff)
gem_wsim: Add some randomness to the 17i7 workload
It was the only one with no randomness. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Diffstat (limited to 'benchmarks/wsim/vcs1.wsim')
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