Prepare for 64bit relocation addresses

This reveal that quite a few locations were writing relocation offsets
but only allowing for 32 bit addresses. To reveal such places in active
tests, we also now double check that we do not use more batch space than
declared.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

5 files changed, 30 insertions, 29 deletions

diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index b4598fbf..175791e1 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -240,10 +240,11 @@ intel_batchbuffer_flush(struct intel_batchbuffer *batch)
  */
 void
 intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
-                             drm_intel_bo *buffer, uint32_t delta,
+                             drm_intel_bo *buffer, uint64_t delta,
 			     uint32_t read_domains, uint32_t write_domain,
 			     int fenced)
 {
+	uint64_t offset;
 	int ret;
 
 	if (batch->ptr - batch->buffer > BATCH_SZ)
@@ -259,7 +260,12 @@ intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
 		ret = drm_intel_bo_emit_reloc(batch->bo, batch->ptr - batch->buffer,
 					      buffer, delta,
 					      read_domains, write_domain);
-	intel_batchbuffer_emit_dword(batch, buffer->offset + delta);
+
+	offset = buffer->offset64;
+	offset += delta;
+	intel_batchbuffer_emit_dword(batch, offset);
+	if (batch->gen >= 8)
+		intel_batchbuffer_emit_dword(batch, offset >> 32);
 	igt_assert(ret == 0);
 }
 
@@ -362,14 +368,26 @@ intel_blt_copy(struct intel_batchbuffer *batch,
 		  dst_pitch);
 	OUT_BATCH((dst_y1 << 16) | dst_x1); /* dst x1,y1 */
 	OUT_BATCH(((dst_y1 + height) << 16) | (dst_x1 + width)); /* dst x2,y2 */
-	OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
-	BLIT_RELOC_UDW(batch->devid);
+	OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
 	OUT_BATCH((src_y1 << 16) | src_x1); /* src x1,y1 */
 	OUT_BATCH(src_pitch);
-	OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
-	BLIT_RELOC_UDW(batch->devid);
+	OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
 	ADVANCE_BATCH();
 
+#define CMD_POLY_STIPPLE_OFFSET       0x7906
+	if (gen == 5) {
+		OUT_BATCH(CMD_POLY_STIPPLE_OFFSET << 16);
+		OUT_BATCH(0);
+	}
+
+	if (gen >= 6 && src_bo == dst_bo) {
+		BEGIN_BATCH(3);
+		OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
+		OUT_BATCH(0);
+		OUT_BATCH(0);
+		ADVANCE_BATCH();
+	}
+
 	intel_batchbuffer_flush(batch);
 }
 
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 5db70fb6..37955a78 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -17,7 +17,7 @@ struct intel_batchbuffer {
 	drm_intel_bo *bo;
 
 	uint8_t buffer[BATCH_SZ];
-	uint8_t *ptr;
+	uint8_t *ptr, *end;
 	uint8_t *state;
 };
 
@@ -39,7 +39,7 @@ void intel_batchbuffer_data(struct intel_batchbuffer *batch,
 
 void intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
 				  drm_intel_bo *buffer,
-				  uint32_t delta,
+				  uint64_t delta,
 				  uint32_t read_domains,
 				  uint32_t write_domain,
 				  int fenced);
@@ -85,7 +85,9 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
  * scope.
  */
 #define BEGIN_BATCH(n) do {						\
+	igt_assert(batch->end == NULL); \
 	intel_batchbuffer_require_space(batch, (n)*4);			\
+	batch->end = batch->ptr + (n) * 4; \
 } while (0)
 
 /**
@@ -144,6 +146,8 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
  * scope.
  */
 #define ADVANCE_BATCH() do {						\
+	igt_assert(batch->ptr == batch->end); \
+	batch->end = NULL; \
 } while(0)
 
 #define BLIT_COPY_BATCH_START(devid, flags) do { \
@@ -177,18 +181,6 @@ intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
 	} \
 } while(0)
 
-/**
- * BLIT_RELOC_UDW:
- * @devid: pci device id of the drm device
- *
- * Emits the upper relocation DWORD on gen8+ and nothing on earlier generations.
- */
-#define BLIT_RELOC_UDW(devid) do { \
-	if (intel_gen(devid) >= 8) { \
-		OUT_BATCH(0); \
-	} \
-} while(0)
-
 void
 intel_blt_copy(struct intel_batchbuffer *batch,
 	      drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch,
diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c
index 3ca1bfa7..4a8fe5a2 100644
--- a/lib/media_fill_gen8.c
+++ b/lib/media_fill_gen8.c
@@ -205,12 +205,10 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 
 	/* surface */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* dynamic */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
 		0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* indirect */
 	OUT_BATCH(0);
@@ -218,7 +216,6 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 
 	/* instruction */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* general state buffer size */
 	OUT_BATCH(0xfffff000 | 1);
diff --git a/lib/media_fill_gen8lp.c b/lib/media_fill_gen8lp.c
index 7fa37a89..1f8a4adc 100644
--- a/lib/media_fill_gen8lp.c
+++ b/lib/media_fill_gen8lp.c
@@ -205,12 +205,10 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 
 	/* surface */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* dynamic */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
 		0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* indirect */
 	OUT_BATCH(0);
@@ -218,7 +216,6 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch)
 
 	/* instruction */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* general state buffer size */
 	OUT_BATCH(0xfffff000 | 1);
diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c
index 6d196316..fa1ccfbe 100644
--- a/lib/rendercopy_gen8.c
+++ b/lib/rendercopy_gen8.c
@@ -522,12 +522,10 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch) {
 
 	/* surface */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_SAMPLER, 0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* dynamic */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_RENDER | I915_GEM_DOMAIN_INSTRUCTION,
 		  0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* indirect */
 	OUT_BATCH(0);
@@ -535,7 +533,6 @@ gen8_emit_state_base_address(struct intel_batchbuffer *batch) {
 
 	/* instruction */
 	OUT_RELOC(batch->bo, I915_GEM_DOMAIN_INSTRUCTION, 0, BASE_ADDRESS_MODIFY);
-	OUT_BATCH(0);
 
 	/* general state buffer size */
 	OUT_BATCH(0xfffff000 | 1);