diff options
| author | Eric Anholt <eric@anholt.net> | 2011-05-06 12:15:50 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2011-05-17 17:54:26 -0700 |
| commit | d73cdde45afc41fb7b36829eda1af763af682ada (patch) | |
| tree | 7bcc71a88496c423d22b23cbd72db22c0fc4b293 /lib | |
| parent | a825173a5f2154b0491f7b5554c10ab7146b4592 (diff) | |
Add Ivybridge support to intel_gpu_dump and the BLT tests.
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/intel_batchbuffer.c | 2 | ||||
| -rwxr-xr-x | lib/intel_chipset.h | 7 |
2 files changed, 7 insertions, 2 deletions
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c index a2f9ae71..111f65d4 100644 --- a/lib/intel_batchbuffer.c +++ b/lib/intel_batchbuffer.c @@ -108,7 +108,7 @@ intel_batchbuffer_flush(struct intel_batchbuffer *batch) batch->ptr = NULL; ring = 0; - if (IS_GEN6(batch->devid)) + if (HAS_BLT_RING(batch->devid)) ring = I915_EXEC_BLT; ret = drm_intel_bo_mrb_exec(batch->bo, used, NULL, 0, 0, ring); assert(ret == 0); diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h index c4cb8209..c3db3abc 100755 --- a/lib/intel_chipset.h +++ b/lib/intel_chipset.h @@ -90,7 +90,9 @@ devid == PCI_CHIP_I945_GME || \ devid == PCI_CHIP_I965_GM || \ devid == PCI_CHIP_I965_GME || \ - devid == PCI_CHIP_GM45_GM || IS_IGD(devid)) + devid == PCI_CHIP_GM45_GM || IS_IGD(devid) || \ + devid == PCI_CHIP_IVYBRIDGE_M_GT1 || \ + devid == PCI_CHIP_IVYBRIDGE_M_GT2) #define IS_G45(devid) (devid == PCI_CHIP_IGD_E_G || \ devid == PCI_CHIP_Q45_G || \ @@ -163,3 +165,6 @@ #define HAS_PCH_SPLIT(devid) (IS_GEN5(devid) || \ IS_GEN6(devid) || \ IS_GEN7(devid)) + +#define HAS_BLT_RING(devid) (IS_GEN6(devid) || \ + IS_GEN7(devid)) |