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author | Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com> | 2018-07-12 01:09:41 -0700 |
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committer | Rodrigo Vivi <rodrigo.vivi@intel.com> | 2018-07-13 15:30:08 -0700 |
commit | 79a6c2dab5d46d55fff0e9f075c4de2a1fd131a2 (patch) | |
tree | a8b4c6ff9e44070f3529c5552e81dee01ec5af61 /tests/Makefile.sources | |
parent | 86b1db1eb0041411f1c13da6cbe135f3b4ad5bbe (diff) |
tests/kms_psr_sink_crc: Do not test sink crc
eDP sink crc reads use vblank interrupts that cause PSR exit and
therefore makes them unsuitable for PSR testing. Besides that, reading
sink CRC via the AUX channel for testing when the HW also is most likely
is going to be using AUX channel is a recipe for inconsistent test
results. Thirdly, CRC's have been seen to be noisy/inconsistent across
sinks. We tradeoff the ability to validate what the sink is displaying
for correctness.
We also make use of source PSR status register to check whether HW tracking
triggered PSR exit upon an exit event.
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Diffstat (limited to 'tests/Makefile.sources')
0 files changed, 0 insertions, 0 deletions