i915/gem_mmap_gtt: Check that the initial pagefault is non-blocking

Historically, the GTT pagefault invoked set-domain(GTT) to transparently
handle swapin. However, this implied that the GTT faults were
synchronous with GPU rendering, which was not the desired ABI, as
synchronisation is explicit via calls to GEM_WAIT or GEM_SET_DOMAIN. In
MMAP_GTT_VERSION, this accidental ABI is removed and so we test it is
gone and does not come back.

For completeness, we verify that the other mmap paths didn't block on
initial pagefaulting.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>

1 files changed, 35 insertions, 0 deletions

diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
index e6244fd0..9a00f4ea 100644
--- a/tests/i915/gem_mmap_gtt.c
+++ b/tests/i915/gem_mmap_gtt.c
@@ -287,6 +287,39 @@ test_wc(int fd)
 		     5*gtt_writes/256., 5*cpu_writes/256.);
 }
 
+static int mmap_gtt_version(int i915)
+{
+	int val = 0;
+	struct drm_i915_getparam gp = {
+		gp.param = 40, /* MMAP_GTT_VERSION */
+		gp.value = &val,
+	};
+
+	ioctl(i915, DRM_IOCTL_I915_GETPARAM, &gp);
+	return val;
+}
+
+static void
+test_pf_nonblock(int i915)
+{
+	igt_spin_t *spin;
+	uint32_t *ptr;
+
+	igt_require(mmap_gtt_version(i915) >= 3);
+
+	spin = igt_spin_batch_new(i915);
+
+	igt_set_timeout(1, "initial pagefaulting did not complete within 1s");
+
+	ptr = gem_mmap__gtt(i915, spin->handle, 4096, PROT_WRITE);
+	ptr[256] = 0;
+	munmap(ptr, 4096);
+
+	igt_reset_timeout();
+
+	igt_spin_batch_free(i915, spin);
+}
+
 static void
 test_write_gtt(int fd)
 {
@@ -900,6 +933,8 @@ igt_main
 		test_write_cpu_read_gtt(fd);
 	igt_subtest("basic-wc")
 		test_wc(fd);
+	igt_subtest("pf-nonblock")
+		test_pf_nonblock(fd);
 
 	igt_subtest("basic-small-bo")
 		test_huge_bo(fd, -1, I915_TILING_NONE);