diff options
author | Arkadiusz Hiler <arkadiusz.hiler@intel.com> | 2018-10-18 14:06:42 +0300 |
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committer | Arkadiusz Hiler <arkadiusz.hiler@intel.com> | 2018-10-23 10:55:51 +0300 |
commit | 741bf7064c467df725c14cc0b3b8b50436f9ee09 (patch) | |
tree | 0ad6fb217dca79a8f1175fb289979b574222fefa /tests/i915/gem_non_secure_batch.c | |
parent | 78619fde4008424c472906041edb1d204e014f7c (diff) |
tests: Introduce i915 directory
We can already move all the tests with distinct prefixes: gem_, gen3_
and i915_.
pm_ and drv_ tests will follow in batches, so we can do the
adjustments in the reporting/filtering layer of the CI system.
v2: Fix test-list.txt generation with meson
v3: Fix docs build (Petri)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Petri Latvala <petri.latvala@intel.com>
Cc: Martin Peres <martin.peres@linux.intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Reviewed-by: Petri Latvala <petri.latvala@intel.com>
Tested-by: Petri Latvala <petri.latvala@intel.com>
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'tests/i915/gem_non_secure_batch.c')
-rw-r--r-- | tests/i915/gem_non_secure_batch.c | 107 |
1 files changed, 107 insertions, 0 deletions
diff --git a/tests/i915/gem_non_secure_batch.c b/tests/i915/gem_non_secure_batch.c new file mode 100644 index 00000000..5f339914 --- /dev/null +++ b/tests/i915/gem_non_secure_batch.c @@ -0,0 +1,107 @@ +/* + * Copyright © 2011 Intel Corporation + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS + * IN THE SOFTWARE. + * + * Authors: + * Daniel Vetter <daniel.vetter@ffwll.ch> (based on gem_storedw_*.c) + * + */ + +#include "igt.h" +#include <stdlib.h> +#include <stdio.h> +#include <string.h> +#include <fcntl.h> +#include <inttypes.h> +#include <errno.h> +#include <sys/stat.h> +#include <sys/time.h> +#include "drm.h" +#include "intel_bufmgr.h" +#include "i830_reg.h" + +IGT_TEST_DESCRIPTION("Basic check of non-secure batches."); + +static drm_intel_bufmgr *bufmgr; +struct intel_batchbuffer *batch; + +/* + * Testcase: Basic check of non-secure batches + * + * This test tries to stop the render ring with a MI_LOAD_REG command, which + * should fail if the non-secure handling works correctly. + */ + +static int num_rings = 1; + +static void +mi_lri_loop(void) +{ + int i; + + srandom(0xdeadbeef); + + for (i = 0; i < 0x100; i++) { + int ring = random() % num_rings + 1; + + BEGIN_BATCH(4, 0); + OUT_BATCH(MI_LOAD_REGISTER_IMM); + OUT_BATCH(0x203c); /* RENDER RING CTL */ + OUT_BATCH(0); /* try to stop the ring */ + OUT_BATCH(MI_NOOP); + ADVANCE_BATCH(); + + intel_batchbuffer_flush_on_ring(batch, ring); + } +} + +igt_simple_main +{ + int fd; + int devid; + + fd = drm_open_driver(DRIVER_INTEL); + devid = intel_get_drm_devid(fd); + + if (HAS_BSD_RING(devid)) + num_rings++; + + if (HAS_BLT_RING(devid)) + num_rings++; + + + igt_info("num rings detected: %i\n", num_rings); + + bufmgr = drm_intel_bufmgr_gem_init(fd, 4096); + igt_assert(bufmgr); + drm_intel_bufmgr_gem_enable_reuse(bufmgr); + + batch = intel_batchbuffer_alloc(bufmgr, devid); + igt_assert(batch); + + mi_lri_loop(); + gem_quiescent_gpu(fd); + + intel_batchbuffer_free(batch); + drm_intel_bufmgr_destroy(bufmgr); + + close(fd); +} |