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authorLionel Landwerlin <lionel.g.landwerlin@intel.com>2018-03-13 09:03:30 +0000
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>2018-03-13 11:12:54 +0000
commit1bb3995eb6dba8e43981e0378e1c6eea3f730a0f (patch)
treecb61bb63ec8ce59e8ea3eec2c0d810e642445731 /tests
parentb1289c113a9f433e1b57065af02a0bb6ec2cf0d6 (diff)
tests/i915_query: fix expected subslice count on hsw
Haswell's configuration are a bit different from the following Gens. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105476 Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Marta Lofstedt <marta.lofstedt@intel.com>
Diffstat (limited to 'tests')
-rw-r--r--tests/i915_query.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/tests/i915_query.c b/tests/i915_query.c
index bbcf68a6..c7de8cbd 100644
--- a/tests/i915_query.c
+++ b/tests/i915_query.c
@@ -454,11 +454,17 @@ test_query_topology_known_pci_ids(int fd, int devid)
break;
case 2:
igt_assert_eq(n_slices, 1);
- igt_assert_eq(n_subslices, 3);
+ if (dev_info->is_haswell)
+ igt_assert_eq(n_subslices, 2);
+ else
+ igt_assert_eq(n_subslices, 3);
break;
case 3:
igt_assert_eq(n_slices, 2);
- igt_assert_eq(n_subslices, 2 * 3);
+ if (dev_info->is_haswell)
+ igt_assert_eq(n_subslices, 2 * 2);
+ else
+ igt_assert_eq(n_subslices, 2 * 3);
break;
case 4:
igt_assert_eq(n_slices, 3);