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authorPaulo Zanoni <paulo.r.zanoni@intel.com>2013-05-07 12:53:52 -0300
committerPaulo Zanoni <paulo.r.zanoni@intel.com>2013-07-03 14:49:09 -0300
commitc013bb02e653f53e9033fe3d95e8204587e499a8 (patch)
tree18ffc08ce6f5e71581464023d47ac66c47ff0c71 /tools
parentc6cec844f95e3fbd4b140586c2453916328b7aa4 (diff)
intel_reg_dumper: add hsw_debug_lp_wm
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Diffstat (limited to 'tools')
-rw-r--r--tools/intel_reg_dumper.c21
1 files changed, 18 insertions, 3 deletions
diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c
index 113fd50b..56504694 100644
--- a/tools/intel_reg_dumper.c
+++ b/tools/intel_reg_dumper.c
@@ -1796,6 +1796,21 @@ DEBUGSTRING(hsw_debug_wm_pipe)
sprite, cursor);
}
+DEBUGSTRING(hsw_debug_lp_wm)
+{
+ const char *enable;
+ uint32_t latency, fbc, pri, cur;
+
+ enable = (val & 31) ? "enabled" : "disabled";
+ latency = (val >> 24) & 0x7F;
+ fbc = (val >> 20) & 0xF;
+ pri = (val >> 8) & 0x3FF;
+ cur = val & 0xFF;
+
+ snprintf(result, len, "%s, latency %d, fbc %d, pri %d, cur %d",
+ enable, latency, fbc, pri, cur);
+}
+
DEBUGSTRING(hsw_debug_sinterrupt)
{
int portd, portc, portb, crt;
@@ -2266,9 +2281,9 @@ static struct reg_debug haswell_debug_regs[] = {
DEFINEREG2(WM_PIPE_A, hsw_debug_wm_pipe),
DEFINEREG2(WM_PIPE_B, hsw_debug_wm_pipe),
DEFINEREG2(WM_PIPE_C, hsw_debug_wm_pipe),
- DEFINEREG(WM_LP1),
- DEFINEREG(WM_LP2),
- DEFINEREG(WM_LP3),
+ DEFINEREG2(WM_LP1, hsw_debug_lp_wm),
+ DEFINEREG2(WM_LP2, hsw_debug_lp_wm),
+ DEFINEREG2(WM_LP3, hsw_debug_lp_wm),
DEFINEREG(WM_LP1_SPR),
DEFINEREG(WM_LP2_SPR),
DEFINEREG(WM_LP3_SPR),