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-rw-r--r--tests/gem_pipe_control_store_loop.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/tests/gem_pipe_control_store_loop.c b/tests/gem_pipe_control_store_loop.c
index 86681f2a..86ee4050 100644
--- a/tests/gem_pipe_control_store_loop.c
+++ b/tests/gem_pipe_control_store_loop.c
@@ -47,6 +47,8 @@
#include "intel_chipset.h"
#include "intel_io.h"
+IGT_TEST_DESCRIPTION("Test (TLB-)Coherency of pipe_control QW writes.");
+
static drm_intel_bufmgr *bufmgr;
struct intel_batchbuffer *batch;
uint32_t devid;