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The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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We ended up with 2 structures that where exactly the same, so just use
one, which happens to be the one Mesa has.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
I had to drop how mesa splits msg_control as the current assembly
language gives access the the whole msg_control field.
Recompiling the xorg and the intel driver of libva shaders doesn't show
any difference in the assembly created.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
I had to drop how mesa splits msg_control as the current assembly
language gives access the the whole msg_control field.
Recompiling the xorg and the intel driver of libva shaders doesn't show
any difference in the assembly created.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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The purpose of this commit is to synchronize opcode definitions across
the gen4asm assembler and mesa.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Mesa's brw_structs.h has named/renamed this field to da3src. Sync with
them.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Two changes there, a field has been renamed and one bit of padding is
now used for compressed instructions.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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And start displaying a nice summary of what we are going to compile.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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This does not bring us anything these days, not using the macro at all
is the same thing as having it always on.
See this discussion:
https://www.redhat.com/archives/virt-tools-list/2010-October/msg00049.html
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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TAGS files are generated with "make tags" to quickly jump through the
code. Ignore those by-products of automake/ctags.
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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The library in lib/ exposes <cairo.h> in its main header and thus users
must be able to include it.
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Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
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Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
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This is also for media encoding like VME, which can do
the operation of check & refinement.
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
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It uses the byte-aligned jump instead of 64-bit units.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
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Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
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This is preparatory work for Haswell (Gen 7.5).
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
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Add new helper macros to check versions:
- IS_GENp() meant to match Gen X and above
- IS_GENx() meant to match Gen X exactly.
Patch mechanically generated. No stale "gen_level" usage.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
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Gen7 JMPI Restrictions in bspec:
The JIP data type must be Signed DWord
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The AddrSubRegNum field in the instruction binary code should be:
code value(advanced_flag==0) value(advanced_flag==1)
a0.0 0 0
a0.1 invalid input 1
a0.2 1 2
a0.3 invalid input 3
a0.4 2 4
a0.5 invalid input 5
a0.6 3 6
a0.7 invalid input 7
a0.8 4 invalid input
a0.10 5 invalid input
a0.12 6 invalid input
a0.14 7 invalid input
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When in normal mode, subreg_nr should not be divided by type_size.
This patch fixes such bug.
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replicated code.
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Add bits1.three_src.gen6.dest_reg_file according to Gen6 spec
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Also fix integer argument parsing rule for JMPI, IF and WHILE
Fix shift/reduce conflicts in relativelocation
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brd: redirect channels to branches
brc: let channels converging together
also rewrite code converting label to offset
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This recursing cost less memory. It is recommended by Bison.
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Bspec says JIP and UIP should be the source operands. It is better if
src_operand has a field "reloc_target" according to bspec.
The replicative code in JMPI and branchloop rules can be merged into one.
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Original rule set it to EXP | NUMBER, then YYERROR if it is NUMBER.
This patch set it directly to EXP, restricting its type to int.
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Label matching is faster because of searching only in a small list,
rather than searching a label in all instructions.
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Since Gen6+, some branching instructions have two relocation targets.
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Later same name .declare pragma will override previously defined
one. This patch add a test case for that feature.
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STRING has been malloc'ed by strdup in src/lex.l but forgotten to
be freed in src/gram.y.
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Such JIP has 25 bits length in Gen6.
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